# UINT64 Mmio32CpuBase; // mapping target in 64-bit cpu-physical space\r
# UINT64 Mmio64CpuBase; // mapping target in 64-bit cpu-physical space\r
#\r
- # PcdPciIoTranslation = IoCpuBase - PcdPciIoBase;\r
+ # gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation = IoCpuBase - PcdPciIoBase;\r
# PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base;\r
# PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base;\r
#\r
# UINT64 TranslatedMmio64Address; // output parameter\r
#\r
# TranslatedIoAddress = UntranslatedIoAddress +\r
- # PcdPciIoTranslation;\r
+ # gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation;\r
# TranslatedMmio32Address = (UINT64)UntranslatedMmio32Address +\r
# PcdPciMmio32Translation;\r
# TranslatedMmio64Address = UntranslatedMmio64Address +\r
#\r
gArmTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x00000050\r
gArmTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x00000051\r
- gArmTokenSpaceGuid.PcdPciIoTranslation|0x0|UINT64|0x00000052\r
gArmTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT32|0x00000053\r
gArmTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT32|0x00000054\r
gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0|UINT64|0x00000055\r