ArmPkg: Allow platforms to report their boot status via OemMiscLib call

[mirror_edk2.git] / ArmPkg / ArmPkg.dec

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 0ec5e8efd6e0726456099e4bf0bd8f5849835dbd..a8a22c649ff820e20eed988c74598f246b23ffdb 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -4,13 +4,7 @@
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
 # Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.\r
 #\r
-#    This program and the accompanying materials\r
-#    are licensed and made available under the terms and conditions of the BSD License\r
-#    which accompanies this distribution. The full text of the license may be found at\r
-#    http://opensource.org/licenses/bsd-license.php\r
-#\r
-#    THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-#    WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#    SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
 #**/\r
 \r
@@ -59,6 +53,7 @@
   ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
   ## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h\r
   gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }\r
+  gArmScmiClock2ProtocolGuid = { 0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } }\r
 \r
   ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
   ## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h\r
@@ -83,16 +78,19 @@
   # Define if the GICv3 controller should use the GICv2 legacy\r
   gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042\r
 \r
-  # Whether to implement warm reboot for capsule update using a jump back to the\r
-  # PEI entry point with caches and interrupts disabled.\r
-  gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot|FALSE|BOOLEAN|0x0000001F\r
-\r
 [PcdsFeatureFlag.ARM]\r
   # Whether to map normal memory as non-shareable. FALSE is the safe choice, but\r
   # TRUE may be appropriate to fix performance problems if you don't care about\r
   # hardware coherency (i.e., no virtualization or cache coherent DMA)\r
   gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043\r
 \r
+[PcdsFeatureFlag.AARCH64]\r
+  ## Used to select method for requesting services from S-EL1.<BR><BR>\r
+  #   TRUE  - Selects FF-A calls for communication between S-EL0 and SPMC.<BR>\r
+  #   FALSE - Selects SVC calls for communication between S-EL0 and SPMC.<BR>\r
+  # @Prompt Enable FF-A support.\r
+  gArmTokenSpaceGuid.PcdFfaEnable|FALSE|BOOLEAN|0x0000005B\r
+\r
 [PcdsFixedAtBuild.common]\r
   gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006\r
 \r
@@ -124,6 +122,20 @@
   # The Primary Core is ClusterId[0] & CoreId[0]\r
   gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037\r
 \r
+  #\r
+  # SMBIOS PCDs\r
+  #\r
+  gArmTokenSpaceGuid.PcdSystemProductName|L""|VOID*|0x30000053\r
+  gArmTokenSpaceGuid.PcdSystemVersion|L""|VOID*|0x30000054\r
+  gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x30000055\r
+  gArmTokenSpaceGuid.PcdBaseBoardProductName|L""|VOID*|0x30000056\r
+  gArmTokenSpaceGuid.PcdBaseBoardVersion|L""|VOID*|0x30000057\r
+  gArmTokenSpaceGuid.PcdProcessorManufacturer|L""|VOID*|0x30000071\r
+  gArmTokenSpaceGuid.PcdProcessorVersion|L""|VOID*|0x30000072\r
+  gArmTokenSpaceGuid.PcdProcessorSerialNumber|L""|VOID*|0x30000073\r
+  gArmTokenSpaceGuid.PcdProcessorAssetTag|L""|VOID*|0x30000074\r
+  gArmTokenSpaceGuid.PcdProcessorPartNumber|L""|VOID*|0x30000075\r
+\r
   #\r
   # ARM L2x0 PCDs\r
   #\r
@@ -224,6 +236,9 @@
   gArmTokenSpaceGuid.PcdMmBufferBase|0|UINT64|0x00000045\r
   gArmTokenSpaceGuid.PcdMmBufferSize|0|UINT64|0x00000046\r
 \r
+  gArmTokenSpaceGuid.PcdSystemBiosRelease|0xFFFF|UINT16|0x30000058\r
+  gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease|0xFFFF|UINT16|0x30000059\r
+\r
 [PcdsFixedAtBuild.common, PcdsDynamic.common]\r
   #\r
   # ARM Architectural Timer\r