OvmfPkg: raise DXEFV size to 13 MB in the traditional platform FDFs

[mirror_edk2.git] / ArmPkg / ArmPkg.dec

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 214b2f5892174a19fdefec798bd37386c7766d4f..f17ba913e6de1326d49b93d6a15378ff2f522d24 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -2,7 +2,8 @@
 # ARM processor package.\r
 #\r
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
-# Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011 - 2022, ARM Limited. All rights reserved.\r
+# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.\r
 #\r
 #    SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -70,6 +71,11 @@
   #\r
   ArmSvcLib|Include/Library/ArmSvcLib.h\r
 \r
+  ##  @libraryclass  Provides a Monitor Call interface that will use the\r
+  #   default conduit (HVC or SMC).\r
+  #\r
+  ArmMonitorLib|Include/Library/ArmMonitorLib.h\r
+\r
   ##  @libraryclass  Provides a default exception handler.\r
   #\r
   DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h\r
@@ -98,6 +104,8 @@
   # Include/Guid/ArmMpCoreInfo.h\r
   gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5,  {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }\r
 \r
+  gArmMmuReplaceLiveTranslationEntryFuncGuid = { 0xa8b50ff3, 0x08ec, 0x4dd3, {0xbf, 0x04, 0x28, 0xbf, 0x71, 0x75, 0xc7, 0x4a} }\r
+\r
 [Protocols.common]\r
   ## Arm System Control and Management Interface(SCMI) Base protocol\r
   ## ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h\r
@@ -131,13 +139,18 @@
   # Define if the GICv3 controller should use the GICv2 legacy\r
   gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042\r
 \r
+  ## Define the conduit to use for monitor calls.\r
+  # Default PcdMonitorConduitHvc = FALSE, conduit = SMC\r
+  # If PcdMonitorConduitHvc = TRUE, conduit = HVC\r
+  gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x00000047\r
+\r
 [PcdsFeatureFlag.ARM]\r
   # Whether to map normal memory as non-shareable. FALSE is the safe choice, but\r
   # TRUE may be appropriate to fix performance problems if you don't care about\r
   # hardware coherency (i.e., no virtualization or cache coherent DMA)\r
   gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043\r
 \r
-[PcdsFeatureFlag.AARCH64]\r
+[PcdsFeatureFlag.AARCH64, PcdsFeatureFlag.ARM]\r
   ## Used to select method for requesting services from S-EL1.<BR><BR>\r
   #   TRUE  - Selects FF-A calls for communication between S-EL0 and SPMC.<BR>\r
   #   FALSE - Selects SVC calls for communication between S-EL0 and SPMC.<BR>\r
@@ -337,9 +350,9 @@
   #   UINT64 Mmio32CpuBase; // mapping target in 64-bit cpu-physical space\r
   #   UINT64 Mmio64CpuBase; // mapping target in 64-bit cpu-physical space\r
   #\r
-  #   PcdPciIoTranslation     = IoCpuBase     - PcdPciIoBase;\r
-  #   PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base;\r
-  #   PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base;\r
+  #   gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation = IoCpuBase - PcdPciIoBase;\r
+  #   gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base;\r
+  #   gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base;\r
   #\r
   # because (a) the target address space (ie. the cpu-physical space) is\r
   # 64-bit, and (b) the translation values are meant as offsets for *modular*\r
@@ -356,11 +369,11 @@
   #   UINT64 TranslatedMmio64Address;   // output parameter\r
   #\r
   #   TranslatedIoAddress     = UntranslatedIoAddress +\r
-  #                             PcdPciIoTranslation;\r
+  #                             gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation;\r
   #   TranslatedMmio32Address = (UINT64)UntranslatedMmio32Address +\r
-  #                             PcdPciMmio32Translation;\r
+  #                             gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation;\r
   #   TranslatedMmio64Address = UntranslatedMmio64Address +\r
-  #                             PcdPciMmio64Translation;\r
+  #                             gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation;\r
   #\r
   #  The modular arithmetic performed in UINT64 ensures that the translation\r
   #  works correctly regardless of the relation between IoCpuBase and\r
@@ -369,16 +382,20 @@
   #\r
   gArmTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x00000050\r
   gArmTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x00000051\r
-  gArmTokenSpaceGuid.PcdPciIoTranslation|0x0|UINT64|0x00000052\r
   gArmTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT32|0x00000053\r
   gArmTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT32|0x00000054\r
-  gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0|UINT64|0x00000055\r
   gArmTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x00000056\r
   gArmTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x00000057\r
-  gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0|UINT64|0x00000058\r
 \r
   #\r
   # Inclusive range of allowed PCI buses.\r
   #\r
   gArmTokenSpaceGuid.PcdPciBusMin|0x0|UINT32|0x00000059\r
   gArmTokenSpaceGuid.PcdPciBusMax|0x0|UINT32|0x0000005A\r
+\r
+[PcdsDynamicEx]\r
+  #\r
+  # This dynamic PCD hold the GUID of a firmware FFS which contains\r
+  # the LinuxBoot payload.\r
+  #\r
+  gArmTokenSpaceGuid.PcdLinuxBootFileGuid|{0x0}|VOID*|0x0000005C\r