#include <Base.h>\r
#include <Library/ArmLib.h>\r
#include <Library/ArmCpuLib.h>\r
-#include <Library/ArmArchTimerLib.h>\r
+#include <Library/ArmGenericTimerCounterLib.h>\r
#include <Library/DebugLib.h>\r
-#include <Library/IoLib.h>\r
#include <Library/PcdLib.h>\r
\r
#include <Chipset/ArmCortexA5x.h>\r
\r
// Note: System Counter frequency can only be set in Secure privileged mode,\r
// if security extensions are implemented.\r
- ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));\r
+ ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));\r
\r
if (ArmIsMpCore ()) {\r
// Turn on SMP coherency\r
ArmSetCpuExCrBit (A5X_FEATURE_SMP);\r
}\r
\r
+ //\r
+ // If CPU is CortexA57 r0p0 apply Errata: 806969\r
+ //\r
+ if ((ArmReadMidr () & ((ARM_CPU_TYPE_MASK << 4) | ARM_CPU_REV_MASK)) ==\r
+ ((ARM_CPU_TYPE_A57 << 4) | ARM_CPU_REV(0,0))) {\r
+ // DisableLoadStoreWB\r
+ ArmSetCpuActlrBit (1ULL << 49);\r
+ }\r
}\r
\r
VOID\r