\r
#endif\r
\r
-.text\r
-.align 2\r
-\r
-GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)\r
-GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)\r
-GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)\r
-GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)\r
-GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)\r
-GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)\r
-GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)\r
-GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)\r
-\r
//UINT32\r
//EFIAPI\r
//ArmGicV3GetControlSystemRegisterEnable (\r
// VOID\r
// );\r
-ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):\r
+ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)\r
EL1_OR_EL2_OR_EL3(x1)\r
1: mrs x0, ICC_SRE_EL1\r
b 4f\r
//ArmGicV3SetControlSystemRegisterEnable (\r
// IN UINT32 ControlSystemRegisterEnable\r
// );\r
-ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):\r
+ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)\r
EL1_OR_EL2_OR_EL3(x1)\r
1: msr ICC_SRE_EL1, x0\r
b 4f\r
//ArmGicV3EnableInterruptInterface (\r
// VOID\r
// );\r
-ASM_PFX(ArmGicV3EnableInterruptInterface):\r
+ASM_FUNC(ArmGicV3EnableInterruptInterface)\r
mov x0, #1\r
msr ICC_IGRPEN1_EL1, x0\r
ret\r
//ArmGicV3DisableInterruptInterface (\r
// VOID\r
// );\r
-ASM_PFX(ArmGicV3DisableInterruptInterface):\r
+ASM_FUNC(ArmGicV3DisableInterruptInterface)\r
mov x0, #0\r
msr ICC_IGRPEN1_EL1, x0\r
ret\r
//ArmGicV3EndOfInterrupt (\r
// IN UINTN InterruptId\r
// );\r
-ASM_PFX(ArmGicV3EndOfInterrupt):\r
+ASM_FUNC(ArmGicV3EndOfInterrupt)\r
msr ICC_EOIR1_EL1, x0\r
ret\r
\r
//ArmGicV3AcknowledgeInterrupt (\r
// VOID\r
// );\r
-ASM_PFX(ArmGicV3AcknowledgeInterrupt):\r
+ASM_FUNC(ArmGicV3AcknowledgeInterrupt)\r
mrs x0, ICC_IAR1_EL1\r
ret\r
\r
//ArmGicV3SetPriorityMask (\r
// IN UINTN Priority\r
// );\r
-ASM_PFX(ArmGicV3SetPriorityMask):\r
+ASM_FUNC(ArmGicV3SetPriorityMask)\r
msr ICC_PMR_EL1, x0\r
ret\r
\r
//ArmGicV3SetBinaryPointer (\r
// IN UINTN BinaryPoint\r
// );\r
-ASM_PFX(ArmGicV3SetBinaryPointer):\r
+ASM_FUNC(ArmGicV3SetBinaryPointer)\r
msr ICC_BPR1_EL1, x0\r
ret\r