ARM Packages: Force the SEC modules to be 2K aligned for AArch64

[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Exception.c

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Exception.c b/ArmPkg/Drivers/CpuDxe/AArch64/Exception.c
index 59246f80bca96738a4ac81b122857a2e5d1363e3..ce1c6ce09a6a7d027f3c34e32239b8bc1d775439 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Exception.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Exception.c
@@ -1,7 +1,7 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-  Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+  Portions Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
@@ -131,11 +131,12 @@ InitializeExceptions (
   FiqEnabled = ArmGetFiqState ();\r
   ArmDisableFiq ();\r
 \r
-  // AArch64 alignment? The Vector table must be 2k-byte aligned (bottom 11 bits zero)?\r
-  //DEBUG ((EFI_D_ERROR, "vbar set addr: 0x%016lx\n",(UINTN)ExceptionHandlersStart));\r
-  //ASSERT(((UINTN)ExceptionHandlersStart & ARM_VECTOR_TABLE_ALIGNMENT) == 0);\r
+  // The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure 'Align=4K'\r
+  // is defined into your FDF for this module.\r
+  ASSERT (((UINTN)ExceptionHandlersStart & ARM_VECTOR_TABLE_ALIGNMENT) == 0);\r
 \r
-  // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.\r
+  // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector\r
+  // Base Address to point into CpuDxe code.\r
   ArmWriteVBar ((UINTN)ExceptionHandlersStart);\r
 \r
   if (FiqEnabled) {\r