\r
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>\r
\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __MACRO_IO_LIB_H__\r
#define __MACRO_IO_LIB_H__\r
\r
-#if defined(__APPLE__)\r
-\r
-//\r
-// ldr reg, =expr does not work with current Apple tool chain. So do the work our selves\r
-//\r
-\r
-// returns _Data in R0 and _Address in R1\r
-#define MmioWrite32(_Address, _Data) \\r
- ldr r1, [pc, #8] ; \\r
- ldr r0, [pc, #8] ; \\r
- str r0, [r1] ; \\r
- b 1f ; \\r
- .long (_Address) ; \\r
- .long (_Data) ; \\r
-1:\r
-\r
-// returns _Data in R0 and _Address in R1, and _OrData in r2\r
-#define MmioOr32(_Address, _OrData) \\r
- ldr r1, [pc, #16] ; \\r
- ldr r2, [pc, #16] ; \\r
- ldr r0, [r1] ; \\r
- orr r0, r0, r2 ; \\r
- str r0, [r1] ; \\r
- b 1f ; \\r
- .long (_Address) ; \\r
- .long (_OrData) ; \\r
-1:\r
-\r
-// returns _Data in R0 and _Address in R1, and _OrData in r2\r
-#define MmioAnd32(_Address, _AndData) \\r
- ldr r1, [pc, #16] ; \\r
- ldr r2, [pc, #16] ; \\r
- ldr r0, [r1] ; \\r
- and r0, r0, r2 ; \\r
- str r0, [r1] ; \\r
- b 1f ; \\r
- .long (_Address) ; \\r
- .long (_AndData) ; \\r
-1:\r
-\r
-// returns result in R0, _Address in R1, and _OrData in r2\r
-#define MmioAndThenOr32(_Address, _AndData, _OrData) \\r
- ldr r1, [pc, #24] ; \\r
- ldr r0, [r1] ; \\r
- ldr r2, [pc, #20] ; \\r
- and r0, r0, r2 ; \\r
- ldr r2, [pc, #16] ; \\r
- orr r0, r0, r2 ; \\r
- str r0, [r1] ; \\r
- b 1f ; \\r
- .long (_Address) ; \\r
- .long (_AndData) ; \\r
- .long (_OrData) ; \\r
-1:\r
-\r
-// returns _Data in _Reg and _Address in R1\r
-#define MmioWriteFromReg32(_Address, _Reg) \\r
- ldr r1, [pc, #4] ; \\r
- str _Reg, [r1] ; \\r
- b 1f ; \\r
- .long (_Address) ; \\r
-1:\r
-\r
-\r
-// returns _Data in R0 and _Address in R1\r
-#define MmioRead32(_Address) \\r
- ldr r1, [pc, #4] ; \\r
- ldr r0, [r1] ; \\r
- b 1f ; \\r
- .long (_Address) ; \\r
-1:\r
-\r
-// returns _Data in Reg and _Address in R1\r
-#define MmioReadToReg32(_Address, _Reg) \\r
- ldr r1, [pc, #4] ; \\r
- ldr _Reg, [r1] ; \\r
- b 1f ; \\r
- .long (_Address) ; \\r
-1:\r
-\r
-\r
-// load R0 with _Data\r
-#define LoadConstant(_Data) \\r
- ldr r0, [pc, #0] ; \\r
- b 1f ; \\r
- .long (_Data) ; \\r
-1:\r
-\r
-// load _Reg with _Data\r
-#define LoadConstantToReg(_Data, _Reg) \\r
- ldr _Reg, [pc, #0] ; \\r
- b 1f ; \\r
- .long (_Data) ; \\r
-1:\r
-\r
-// load _Reg with _Data if eq\r
-#define LoadConstantToRegIfEq(_Data, _Reg) \\r
- ldreq _Reg, [pc, #0] ; \\r
- b 1f ; \\r
- .long (_Data) ; \\r
-1:\r
-\r
-// Convert the (ClusterId,CoreId) into a Core Position\r
-// We assume there are 4 cores per cluster\r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \\r
- lsr Pos, MpId, #6 ; \\r
- and Tmp, MpId, #3 ; \\r
- add Pos, Pos, Tmp\r
-\r
-// Reserve a region at the top of the Primary Core stack\r
-// for Global variables for the XIP phase\r
-#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r
- and Tmp, GlobalSize, #7 ; \\r
- rsbne Tmp, Tmp, #8 ; \\r
- add GlobalSize, GlobalSize, Tmp ; \\r
- sub sp, StackTop, GlobalSize ; \\r
- ; \\r
- mov Tmp, sp ; \\r
- mov GlobalSize, #0x0 ; \\r
-_SetPrimaryStackInitGlobals: ; \\r
- cmp Tmp, StackTop ; \\r
- beq _SetPrimaryStackEnd ; \\r
- str GlobalSize, [Tmp], #4 ; \\r
- b _SetPrimaryStackInitGlobals ; \\r
-_SetPrimaryStackEnd:\r
-\r
-\r
-#elif defined (__GNUC__)\r
-\r
-#define MmioWrite32(Address, Data) \\r
- ldr r1, =Address ; \\r
- ldr r0, =Data ; \\r
- str r0, [r1]\r
- \r
-#define MmioOr32(Address, OrData) \\r
- ldr r1, =Address ; \\r
- ldr r2, =OrData ; \\r
- ldr r0, [r1] ; \\r
- orr r0, r0, r2 ; \\r
- str r0, [r1]\r
-\r
-#define MmioAnd32(Address, AndData) \\r
- ldr r1, =Address ; \\r
- ldr r2, =AndData ; \\r
- ldr r0, [r1] ; \\r
- and r0, r0, r2 ; \\r
- str r0, [r1]\r
-\r
-#define MmioAndThenOr32(Address, AndData, OrData) \\r
- ldr r1, =Address ; \\r
- ldr r0, [r1] ; \\r
- ldr r2, =AndData ; \\r
- and r0, r0, r2 ; \\r
- ldr r2, =OrData ; \\r
- orr r0, r0, r2 ; \\r
- str r0, [r1] \r
-\r
-#define MmioWriteFromReg32(Address, Reg) \\r
- ldr r1, =Address ; \\r
- str Reg, [r1]\r
-\r
-#define MmioRead32(Address) \\r
- ldr r1, =Address ; \\r
- ldr r0, [r1]\r
-\r
-#define MmioReadToReg32(Address, Reg) \\r
- ldr r1, =Address ; \\r
- ldr Reg, [r1]\r
-\r
-#define LoadConstant(Data) \\r
- ldr r0, =Data\r
-\r
-#define LoadConstantToReg(Data, Reg) \\r
- ldr Reg, =Data\r
- \r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \\r
- lsr Pos, MpId, #6 ; \\r
- and Tmp, MpId, #3 ; \\r
- add Pos, Pos, Tmp\r
-\r
-#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r
- and Tmp, GlobalSize, #7 ; \\r
- rsbne Tmp, Tmp, #8 ; \\r
- add GlobalSize, GlobalSize, Tmp ; \\r
- sub sp, StackTop, GlobalSize ; \\r
- ; \\r
- mov Tmp, sp ; \\r
- mov GlobalSize, #0x0 ; \\r
-_SetPrimaryStackInitGlobals: ; \\r
- cmp Tmp, StackTop ; \\r
- beq _SetPrimaryStackEnd ; \\r
- str GlobalSize, [Tmp], #4 ; \\r
- b _SetPrimaryStackInitGlobals ; \\r
-_SetPrimaryStackEnd:\r
-\r
-#else\r
-\r
-//\r
-// Use ARM assembly macros, form armasam \r
-//\r
-// Less magic in the macros if ldr reg, =expr works\r
-//\r
-\r
-// returns _Data in R0 and _Address in R1\r
-\r
+#define _ASM_FUNC(Name, Section) \\r
+ .global Name ; \\r
+ .section #Section, "ax" ; \\r
+ .type Name, %function ; \\r
+ .p2align 2 ; \\r
+ Name:\r
\r
+#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)\r
\r
-#define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data\r
+#define MOV32(Reg, Val) \\r
+ movw Reg, #(Val) & 0xffff ; \\r
+ movt Reg, #(Val) >> 16\r
\r
+#define ADRL(Reg, Sym) \\r
+ movw Reg, #:lower16:(Sym) - (. + 16) ; \\r
+ movt Reg, #:upper16:(Sym) - (. + 12) ; \\r
+ add Reg, Reg, pc\r
\r
-\r
-\r
-// returns Data in R0 and Address in R1, and OrData in r2\r
-#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData\r
- \r
-\r
-// returns _Data in R0 and _Address in R1, and _OrData in r2\r
-\r
-\r
-#define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData\r
-\r
-// returns result in R0, _Address in R1, and _OrData in r2\r
-\r
-\r
-#define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData\r
-\r
-\r
-// returns _Data in _Reg and _Address in R1\r
-\r
-\r
-#define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg\r
-\r
-// returns _Data in R0 and _Address in R1\r
-\r
-\r
-#define MmioRead32(Address) MmioRead32Macro Address\r
-\r
-// returns _Data in Reg and _Address in R1\r
-\r
-\r
-#define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg\r
-\r
-\r
-// load R0 with _Data\r
-\r
-\r
-#define LoadConstant(Data) LoadConstantMacro Data\r
-\r
-// load _Reg with _Data\r
-\r
-\r
-#define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg\r
-\r
-// conditional load testing eq flag\r
-#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg\r
-\r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) GetCorePositionFromMpId Pos, MpId, Tmp\r
-\r
-#define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp\r
-\r
-#endif\r
+#define LDRL(Reg, Sym) \\r
+ movw Reg, #:lower16:(Sym) - (. + 16) ; \\r
+ movt Reg, #:upper16:(Sym) - (. + 12) ; \\r
+ ldr Reg, [pc, Reg]\r
\r
#endif\r