; Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
; Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
;\r
-; This program and the accompanying materials \r
-; are licensed and made available under the terms and conditions of the BSD License \r
-; which accompanies this distribution. The full text of the license may be found at \r
-; http://opensource.org/licenses/bsd-license.php \r
-; \r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
;**/\r
\r
\r
- MACRO \r
- MmioWrite32Macro $Address, $Data \r
- ldr r1, = ($Address) \r
- ldr r0, = ($Data) \r
- str r0, [r1] \r
+ MACRO\r
+ MmioWrite32Macro $Address, $Data\r
+ ldr r1, = ($Address)\r
+ ldr r0, = ($Data)\r
+ str r0, [r1]\r
MEND\r
- \r
- MACRO \r
- MmioOr32Macro $Address, $OrData \r
- ldr r1, =($Address) \r
- ldr r2, =($OrData) \r
- ldr r0, [r1] \r
- orr r0, r0, r2 \r
- str r0, [r1] \r
+\r
+ MACRO\r
+ MmioOr32Macro $Address, $OrData\r
+ ldr r1, =($Address)\r
+ ldr r2, =($OrData)\r
+ ldr r0, [r1]\r
+ orr r0, r0, r2\r
+ str r0, [r1]\r
MEND\r
\r
- MACRO \r
- MmioAnd32Macro $Address, $AndData \r
- ldr r1, =($Address) \r
- ldr r2, =($AndData) \r
- ldr r0, [r1] \r
- and r0, r0, r2 \r
- str r0, [r1] \r
+ MACRO\r
+ MmioAnd32Macro $Address, $AndData\r
+ ldr r1, =($Address)\r
+ ldr r2, =($AndData)\r
+ ldr r0, [r1]\r
+ and r0, r0, r2\r
+ str r0, [r1]\r
MEND\r
\r
- MACRO \r
- MmioAndThenOr32Macro $Address, $AndData, $OrData \r
- ldr r1, =($Address) \r
- ldr r0, [r1] \r
- ldr r2, =($AndData) \r
- and r0, r0, r2 \r
- ldr r2, =($OrData) \r
- orr r0, r0, r2 \r
- str r0, [r1] \r
+ MACRO\r
+ MmioAndThenOr32Macro $Address, $AndData, $OrData\r
+ ldr r1, =($Address)\r
+ ldr r0, [r1]\r
+ ldr r2, =($AndData)\r
+ and r0, r0, r2\r
+ ldr r2, =($OrData)\r
+ orr r0, r0, r2\r
+ str r0, [r1]\r
MEND\r
\r
- MACRO \r
- MmioWriteFromReg32Macro $Address, $Reg \r
- ldr r1, =($Address) \r
- str $Reg, [r1] \r
+ MACRO\r
+ MmioWriteFromReg32Macro $Address, $Reg\r
+ ldr r1, =($Address)\r
+ str $Reg, [r1]\r
MEND\r
\r
- MACRO \r
- MmioRead32Macro $Address \r
- ldr r1, =($Address) \r
- ldr r0, [r1] \r
+ MACRO\r
+ MmioRead32Macro $Address\r
+ ldr r1, =($Address)\r
+ ldr r0, [r1]\r
MEND\r
\r
- MACRO \r
- MmioReadToReg32Macro $Address, $Reg \r
- ldr r1, =($Address) \r
- ldr $Reg, [r1] \r
+ MACRO\r
+ MmioReadToReg32Macro $Address, $Reg\r
+ ldr r1, =($Address)\r
+ ldr $Reg, [r1]\r
MEND\r
\r
- MACRO \r
- LoadConstantMacro $Data \r
- ldr r0, =($Data) \r
+ MACRO\r
+ LoadConstantMacro $Data\r
+ ldr r0, =($Data)\r
MEND\r
\r
- MACRO \r
- LoadConstantToRegMacro $Data, $Reg \r
- ldr $Reg, =($Data) \r
- MEND \r
- \r
MACRO\r
- GetCorePositionFromMpId $Pos, $MpId, $Tmp\r
- ;Note: The ARM macro does not support the pre-processing. 0xFF and (0xFF << 8) are the values of\r
- ; ARM_CORE_MASK and ARM_CLUSTER_MASK \r
- mov $Tmp, #(0xFF :OR: (0xFF << 8))\r
- and $MpId, $Tmp\r
- lsr $Pos, $MpId, #6\r
- and $Tmp, $MpId, #3\r
- add $Pos, $Pos, $Tmp\r
+ LoadConstantToRegMacro $Data, $Reg\r
+ ldr $Reg, =($Data)\r
MEND\r
- \r
+\r
; The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack\r
; Note: Global Size will be modified\r
MACRO\r
_InitializePrimaryStackLoop\r
cmp $Tmp1, sp\r
bls _InitializePrimaryStackEnd\r
- str $GlobalSize, [$Tmp1], #-4\r
+ str $GlobalSize, [$Tmp1, #-4]!\r
b _InitializePrimaryStackLoop\r
_InitializePrimaryStackEnd\r
MEND\r