ArmPlatformPkg/NorFlashDxe: initialize varstore headers eagerly

[mirror_edk2.git] / ArmPkg / Include / AsmMacroIoLib.inc

diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
index 78e2ae29455c31fe5505625268648e3f4468f99d..ce7a1488daea088c0b42b11790b589e5c7e21307 100644 (file)
--- a/ArmPkg/Include/AsmMacroIoLib.inc
+++ b/ArmPkg/Include/AsmMacroIoLib.inc
@@ -3,79 +3,37 @@
 ;  Macros to work around lack of Apple support for LDR register, =expr\r
 ;\r
 ;  Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
-;  This program and the accompanying materials                          \r
-;  are licensed and made available under the terms and conditions of the BSD License         \r
-;  which accompanies this distribution.  The full text of the license may be found at        \r
-;  http://opensource.org/licenses/bsd-license.php                                            \r
-;                                                                                            \r
-;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.  \r
+;  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
+;\r
+;  This program and the accompanying materials\r
+;  are licensed and made available under the terms and conditions of the BSD License\r
+;  which accompanies this distribution.  The full text of the license may be found at\r
+;  http://opensource.org/licenses/bsd-license.php\r
+;\r
+;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 ;\r
 ;**/\r
 \r
 \r
-  MACRO \r
-  MmioWrite32Macro $Address, $Data \r
-  ldr  r1, = ($Address)                \r
-  ldr  r0, = ($Data)                 \r
-  str  r0, [r1]  \r
-  MEND\r
-    \r
-  MACRO \r
-  MmioOr32Macro $Address, $OrData \r
-  ldr  r1, =($Address)               \r
-  ldr  r2, =($OrData)                \r
-  ldr  r0, [r1]                      \r
-  orr  r0, r0, r2                    \r
-  str  r0, [r1] \r
-  MEND\r
-\r
-  MACRO \r
-  MmioAnd32Macro $Address, $AndData \r
-  ldr  r1, =($Address)                 \r
-  ldr  r2, =($AndData)                 \r
-  ldr  r0, [r1]                        \r
-  and  r0, r0, r2                      \r
-  str  r0, [r1] \r
-  MEND\r
-\r
-  MACRO \r
-  MmioAndThenOr32Macro $Address, $AndData, $OrData \r
-  ldr  r1, =($Address)                         \r
-  ldr  r0, [r1]                                        \r
-  ldr  r2, =($AndData)                                 \r
-  and  r0, r0, r2                                      \r
-  ldr  r2, =($OrData)                                  \r
-  orr  r0, r0, r2                                      \r
-  str  r0, [r1]          \r
-  MEND\r
-\r
-  MACRO \r
-  MmioWriteFromReg32Macro $Address, $Reg \r
-  ldr  r1, =($Address)   \r
-  str  $Reg, [r1]        \r
-  MEND\r
-\r
-  MACRO \r
-  MmioRead32Macro $Address   \r
-  ldr  r1, =($Address)         \r
-  ldr  r0, [r1]   \r
+  MACRO\r
+  adrll   $Reg, $Symbol\r
+  add     $Reg, pc, #-8\r
+  RELOC   R_ARM_ALU_PC_G0_NC, $Symbol\r
+  add     $Reg, $Reg, #-4\r
+  RELOC   R_ARM_ALU_PC_G1_NC, $Symbol\r
+  add     $Reg, $Reg, #0\r
+  RELOC   R_ARM_ALU_PC_G2, $Symbol\r
   MEND\r
 \r
-  MACRO \r
-  MmioReadToReg32Macro $Address, $Reg \r
-  ldr  r1, =($Address)                   \r
-  ldr  $Reg, [r1]        \r
+  MACRO\r
+  ldrl    $Reg, $Symbol\r
+  add     $Reg, pc, #-8\r
+  RELOC   R_ARM_ALU_PC_G0_NC, $Symbol\r
+  add     $Reg, $Reg, #-4\r
+  RELOC   R_ARM_ALU_PC_G1_NC, $Symbol\r
+  ldr     $Reg, [$Reg, #0]\r
+  RELOC   R_ARM_LDR_PC_G2, $Symbol\r
   MEND\r
 \r
-  MACRO \r
-  LoadConstantMacro $Data \r
-  ldr  r0, =($Data) \r
-  MEND\r
-\r
-  MACRO \r
-  LoadConstantToRegMacro $Data, $Reg \r
-  ldr  $Reg, =($Data) \r
-  MEND \r
-\r
   END\r