ArmPkg: Fix typo of Manufacturer in comment in SmbiosMiscDxe

[mirror_edk2.git] / ArmPkg / Include / Chipset / AArch64.h

diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index cebfc5da426a44bb97505ed9c1da3b2b2e35a0cc..09d4cfe28da7b5583654ebc984713db273ac5272 100644 (file)
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -1,15 +1,9 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-  Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>\r
+  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>\r
 \r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -45,7 +39,7 @@
 // MIDR - Main ID Register definitions\r
 #define ARM_CPU_TYPE_SHIFT      4\r
 #define ARM_CPU_TYPE_MASK       0xFFF\r
-#define ARM_CPU_TYPE_AEMv8      0xD0F\r
+#define ARM_CPU_TYPE_AEMV8      0xD0F\r
 #define ARM_CPU_TYPE_A53        0xD03\r
 #define ARM_CPU_TYPE_A57        0xD07\r
 #define ARM_CPU_TYPE_A72        0xD08\r
@@ -103,10 +97,10 @@
 #define ARM_VECTOR_CUR_SP0_FIQ  0x100\r
 #define ARM_VECTOR_CUR_SP0_SERR 0x180\r
 \r
-#define ARM_VECTOR_CUR_SPx_SYNC 0x200\r
-#define ARM_VECTOR_CUR_SPx_IRQ  0x280\r
-#define ARM_VECTOR_CUR_SPx_FIQ  0x300\r
-#define ARM_VECTOR_CUR_SPx_SERR 0x380\r
+#define ARM_VECTOR_CUR_SPX_SYNC 0x200\r
+#define ARM_VECTOR_CUR_SPX_IRQ  0x280\r
+#define ARM_VECTOR_CUR_SPX_FIQ  0x300\r
+#define ARM_VECTOR_CUR_SPX_SERR 0x380\r
 \r
 #define ARM_VECTOR_LOW_A64_SYNC 0x400\r
 #define ARM_VECTOR_LOW_A64_IRQ  0x480\r
@@ -118,6 +112,10 @@
 #define ARM_VECTOR_LOW_A32_FIQ  0x700\r
 #define ARM_VECTOR_LOW_A32_SERR 0x780\r
 \r
+// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we\r
+// build for ARMv8.0, we need to define the register here.\r
+#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2\r
+\r
 #define VECTOR_BASE(tbl)          \\r
   .section .text.##tbl##,"ax";    \\r
   .align 11;                      \\r
@@ -225,14 +223,19 @@ ArmReadCurrentEL (
   VOID\r
   );\r
 \r
-UINT64\r
-PageAttributeToGcdAttribute (\r
-  IN UINT64 PageAttributes\r
-  );\r
-\r
 UINTN\r
 ArmWriteCptr (\r
   IN  UINT64 Cptr\r
   );\r
 \r
+UINT32\r
+ArmReadCntHctl (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+ArmWriteCntHctl (\r
+  IN UINT32 CntHctl\r
+  );\r
+\r
 #endif // __AARCH64_H__\r