/** @file\r
*\r
-* Copyright (c) 2012-2017, ARM Limited. All rights reserved.\r
+* Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>\r
+* Copyright (c) 2012 - 2022, Arm Limited. All rights reserved.\r
*\r
-* This program and the accompanying materials\r
-* are licensed and made available under the terms and conditions of the BSD License\r
-* which accompanies this distribution. The full text of the license may be found at\r
-* http://opensource.org/licenses/bsd-license.php\r
+* SPDX-License-Identifier: BSD-2-Clause-Patent\r
*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+* @par Revision Reference:\r
+* - [1] SMC Calling Convention version 1.2\r
+* (https://developer.arm.com/documentation/den0028/c/?lang=en)\r
+* - [2] Arm True Random Number Generator Firmware, Interface 1.0,\r
+* Platform Design Document.\r
+* (https://developer.arm.com/documentation/den0098/latest/)\r
+*\r
+* @par Glossary:\r
+* - TRNG - True Random Number Generator\r
*\r
**/\r
\r
-#ifndef __ARM_STD_SMC_H__\r
-#define __ARM_STD_SMC_H__\r
+#ifndef ARM_STD_SMC_H_\r
+#define ARM_STD_SMC_H_\r
\r
/*\r
* SMC function IDs for Standard Service queries\r
*/\r
\r
-#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00\r
-#define ARM_SMC_ID_STD_UID 0x8400ff01\r
+#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00\r
+#define ARM_SMC_ID_STD_UID 0x8400ff01\r
/* 0x8400ff02 is reserved */\r
-#define ARM_SMC_ID_STD_REVISION 0x8400ff03\r
+#define ARM_SMC_ID_STD_REVISION 0x8400ff03\r
\r
/*\r
* The 'Standard Service Call UID' is supposed to return the Standard\r
* Service UUID. This is a 128-bit value.\r
*/\r
-#define ARM_SMC_STD_UUID0 0x108d905b\r
-#define ARM_SMC_STD_UUID1 0x47e8f863\r
-#define ARM_SMC_STD_UUID2 0xfbc02dae\r
-#define ARM_SMC_STD_UUID3 0xe2f64156\r
+#define ARM_SMC_STD_UUID0 0x108d905b\r
+#define ARM_SMC_STD_UUID1 0x47e8f863\r
+#define ARM_SMC_STD_UUID2 0xfbc02dae\r
+#define ARM_SMC_STD_UUID3 0xe2f64156\r
\r
/*\r
* ARM Standard Service Calls revision numbers\r
* The current revision is: 0.1\r
*/\r
-#define ARM_SMC_STD_REVISION_MAJOR 0x0\r
-#define ARM_SMC_STD_REVISION_MINOR 0x1\r
+#define ARM_SMC_STD_REVISION_MAJOR 0x0\r
+#define ARM_SMC_STD_REVISION_MINOR 0x1\r
\r
/*\r
* Management Mode (MM) calls cover a subset of the Standard Service Call range.\r
* The list below is not exhaustive.\r
*/\r
-#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040\r
-#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040\r
+#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040\r
+#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040\r
\r
// Request service from secure standalone MM environment\r
-#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041\r
-#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041\r
+#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041\r
+#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041\r
+\r
+/* Generic ID when using AArch32 or AArch64 execution state */\r
+#ifdef MDE_CPU_AARCH64\r
+#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64\r
+#endif\r
+#ifdef MDE_CPU_ARM\r
+#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32\r
+#endif\r
\r
/* MM return error codes */\r
-#define ARM_SMC_MM_RET_SUCCESS 0\r
-#define ARM_SMC_MM_RET_NOT_SUPPORTED -1\r
-#define ARM_SMC_MM_RET_INVALID_PARAMS -2\r
-#define ARM_SMC_MM_RET_DENIED -3\r
-#define ARM_SMC_MM_RET_NO_MEMORY -4\r
+#define ARM_SMC_MM_RET_SUCCESS 0\r
+#define ARM_SMC_MM_RET_NOT_SUPPORTED -1\r
+#define ARM_SMC_MM_RET_INVALID_PARAMS -2\r
+#define ARM_SMC_MM_RET_DENIED -3\r
+#define ARM_SMC_MM_RET_NO_MEMORY -4\r
+\r
+// ARM Architecture Calls\r
+#define SMCCC_VERSION 0x80000000\r
+#define SMCCC_ARCH_FEATURES 0x80000001\r
+#define SMCCC_ARCH_SOC_ID 0x80000002\r
+#define SMCCC_ARCH_WORKAROUND_1 0x80008000\r
+#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF\r
+\r
+#define SMC_ARCH_CALL_SUCCESS 0\r
+#define SMC_ARCH_CALL_NOT_SUPPORTED -1\r
+#define SMC_ARCH_CALL_NOT_REQUIRED -2\r
+#define SMC_ARCH_CALL_INVALID_PARAMETER -3\r
\r
/*\r
* Power State Coordination Interface (PSCI) calls cover a subset of the\r
#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005\r
#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008\r
#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009\r
+#define ARM_SMC_ID_PSCI_FEATURES 0x8400000A\r
+#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64 0xC4000012\r
\r
/* The current PSCI version is: 0.2 */\r
#define ARM_SMC_PSCI_VERSION_MAJOR 0\r
((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)\r
\r
/* PSCI return error codes */\r
-#define ARM_SMC_PSCI_RET_SUCCESS 0\r
-#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1\r
-#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2\r
-#define ARM_SMC_PSCI_RET_DENIED -3\r
-#define ARM_SMC_PSCI_RET_ALREADY_ON -4\r
-#define ARM_SMC_PSCI_RET_ON_PENDING -5\r
-#define ARM_SMC_PSCI_RET_INTERN_FAIL -6\r
-#define ARM_SMC_PSCI_RET_NOT_PRESENT -7\r
-#define ARM_SMC_PSCI_RET_DISABLED -8\r
+#define ARM_SMC_PSCI_RET_SUCCESS 0\r
+#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1\r
+#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2\r
+#define ARM_SMC_PSCI_RET_DENIED -3\r
+#define ARM_SMC_PSCI_RET_ALREADY_ON -4\r
+#define ARM_SMC_PSCI_RET_ON_PENDING -5\r
+#define ARM_SMC_PSCI_RET_INTERN_FAIL -6\r
+#define ARM_SMC_PSCI_RET_NOT_PRESENT -7\r
+#define ARM_SMC_PSCI_RET_DISABLED -8\r
\r
#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \\r
((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))\r
#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)\r
#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)\r
\r
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0\r
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1\r
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2\r
-#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3\r
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0\r
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1\r
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2\r
+#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3\r
\r
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0\r
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1\r
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2\r
\r
-#endif\r
+/*\r
+ * SMC function IDs for Trusted OS Service queries\r
+ */\r
+#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00\r
+#define ARM_SMC_ID_TOS_UID 0xbf00ff01\r
+/* 0xbf00ff02 is reserved */\r
+#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03\r
+\r
+// Firmware TRNG interface Function IDs\r
+\r
+/*\r
+ SMC/HVC call to get the version of the TRNG backend,\r
+ Cf. [2], 2.1 TRNG_VERSION\r
+ Input values:\r
+ W0 0x8400_0050\r
+ W1-W7 Reserved (MBZ)\r
+ Return values:\r
+ Success (W0 > 0) W0[31] MBZ\r
+ W0[30:16] Major revision\r
+ W0[15:0] Minor revision\r
+ W1 - W3 Reserved (MBZ)\r
+ Error (W0 < 0)\r
+ NOT_SUPPORTED Function not implemented\r
+*/\r
+#define ARM_SMC_ID_TRNG_VERSION 0x84000050\r
+\r
+/*\r
+ SMC/HVC call to check if a TRNG function ID is implemented by the backend,\r
+ Cf. [2], Section 2.2 TRNG_FEATURES\r
+ Input Values\r
+ W0 0x8400_0051\r
+ W1 trng_func_id\r
+ W2-W7 Reserved (MBZ)\r
+ Return values:\r
+ Success (W0 >= 0):\r
+ SUCCESS Function is implemented.\r
+ > 0 Function is implemented and\r
+ has specific capabilities,\r
+ see function definition.\r
+ Error (W0 < 0)\r
+ NOT_SUPPORTED Function with FID=trng_func_id\r
+ is not implemented\r
+*/\r
+#define ARM_SMC_ID_TRNG_FEATURES 0x84000051\r
+\r
+/*\r
+ SMC/HVC call to get the UUID of the TRNG backend,\r
+ Cf. [2], Section 2.3 TRNG_GET_UUID\r
+ Input Values:\r
+ W0 0x8400_0052\r
+ W1-W7 Reserved (MBZ)\r
+ Return Values:\r
+ Success (W0 != -1)\r
+ W0 UUID[31:0]\r
+ W1 UUID[63:32]\r
+ W2 UUID[95:64]\r
+ W3 UUID[127:96]\r
+ Error (W0 = -1)\r
+ W0 NOT_SUPPORTED\r
+*/\r
+#define ARM_SMC_ID_TRNG_GET_UUID 0x84000052\r
+\r
+/*\r
+ AARCH32 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.\r
+ Input values:\r
+ W0 0x8400_0053\r
+ W2-W7 Reserved (MBZ)\r
+ Return values:\r
+ Success (W0 = 0):\r
+ W0 MBZ\r
+ W1 Entropy[95:64]\r
+ W2 Entropy[63:32]\r
+ W3 Entropy[31:0]\r
+ Error (W0 < 0)\r
+ W0 NOT_SUPPORTED\r
+ NO_ENTROPY\r
+ INVALID_PARAMETERS\r
+ W1 - W3 Reserved (MBZ)\r
+*/\r
+#define ARM_SMC_ID_TRNG_RND_AARCH32 0x84000053\r
+\r
+/*\r
+ AARCH64 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.\r
+ Input values:\r
+ X0 0xC400_0053\r
+ X2-X7 Reserved (MBZ)\r
+ Return values:\r
+ Success (X0 = 0):\r
+ X0 MBZ\r
+ X1 Entropy[191:128]\r
+ X2 Entropy[127:64]\r
+ X3 Entropy[63:0]\r
+ Error (X0 < 0)\r
+ X0 NOT_SUPPORTED\r
+ NO_ENTROPY\r
+ INVALID_PARAMETERS\r
+ X1 - X3 Reserved (MBZ)\r
+*/\r
+#define ARM_SMC_ID_TRNG_RND_AARCH64 0xC4000053\r
+\r
+// Firmware TRNG status codes\r
+#define TRNG_STATUS_SUCCESS (INT32)(0)\r
+#define TRNG_STATUS_NOT_SUPPORTED (INT32)(-1)\r
+#define TRNG_STATUS_INVALID_PARAMETER (INT32)(-2)\r
+#define TRNG_STATUS_NO_ENTROPY (INT32)(-3)\r
+\r
+#endif // ARM_STD_SMC_H_\r
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