/** @file\r
*\r
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
-* \r
-* This program and the accompanying materials \r
-* are licensed and made available under the terms and conditions of the BSD License \r
-* which accompanies this distribution. The full text of the license may be found at \r
-* http://opensource.org/licenses/bsd-license.php \r
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+* This program and the accompanying materials\r
+* are licensed and made available under the terms and conditions of the BSD License\r
+* which accompanies this distribution. The full text of the license may be found at\r
+* http://opensource.org/licenses/bsd-license.php\r
+*\r
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
-#ifndef __PL390GIC_H\r
-#define __PL390GIC_H\r
+#ifndef __ARMGIC_H\r
+#define __ARMGIC_H\r
\r
//\r
// GIC definitions\r
#define ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ 0x08\r
#define ARM_GIC_ICCICR_USE_SBPR 0x10\r
\r
+// Bit Mask for GICC_IIDR\r
+#define ARM_GIC_ICCIDR_GET_PRODUCT_ID(IccIdr) (((IccIdr) >> 20) & 0xFFF)\r
+#define ARM_GIC_ICCIDR_GET_ARCH_VERSION(IccIdr) (((IccIdr) >> 16) & 0xF)\r
+#define ARM_GIC_ICCIDR_GET_REVISION(IccIdr) (((IccIdr) >> 12) & 0xF)\r
+#define ARM_GIC_ICCIDR_GET_IMPLEMENTER(IccIdr) ((IccIdr) & 0xFFF)\r
\r
//\r
// GIC Secure interfaces\r
IN INTN GicInterruptInterfaceBase\r
);\r
\r
+VOID\r
+EFIAPI\r
+ArmGicDisableInterruptInterface (\r
+ IN INTN GicInterruptInterfaceBase\r
+ );\r
+\r
VOID\r
EFIAPI\r
ArmGicEnableDistributor (\r
ArmGicSendSgiTo (\r
IN INTN GicDistributorBase,\r
IN INTN TargetListFilter,\r
- IN INTN CPUTargetList\r
- );\r
-\r
-UINT32\r
-EFIAPI\r
-ArmGicAcknowledgeSgiFrom (\r
- IN INTN GicInterruptInterfaceBase,\r
- IN INTN CoreId\r
+ IN INTN CPUTargetList,\r
+ IN INTN SgiId\r
);\r
\r
-UINT32\r
+RETURN_STATUS\r
EFIAPI\r
-ArmGicAcknowledgeSgi2From (\r
- IN INTN GicInterruptInterfaceBase,\r
- IN INTN CoreId,\r
- IN INTN SgiId\r
+ArmGicAcknowledgeInterrupt (\r
+ IN UINTN GicDistributorBase,\r
+ IN UINTN GicInterruptInterfaceBase,\r
+ OUT UINTN *CoreId,\r
+ OUT UINTN *InterruptId\r
);\r
\r
UINTN\r