BaseTools: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / ArmPkg / Library / ArmCacheMaintenanceLib / ArmCacheMaintenanceLib.c

diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
index 2557a2cf096abe4d7d13fd4c3ce9ec80c7882092..0759e38cd4880798449b1d69e6c4eee1363936df 100644 (file)
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
@@ -1,7 +1,8 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-  \r
+  Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -13,33 +14,30 @@
 **/\r
 #include <Base.h>\r
 #include <Library/ArmLib.h>\r
+#include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
 \r
+STATIC\r
 VOID\r
 CacheRangeOperation (\r
   IN  VOID            *Start,\r
   IN  UINTN           Length,\r
-  IN  CACHE_OPERATION CacheOperation,\r
-  IN  LINE_OPERATION  LineOperation\r
+  IN  LINE_OPERATION  LineOperation,\r
+  IN  UINTN           LineLength\r
   )\r
 {\r
-  UINTN ArmCacheLineLength         = ArmDataCacheLineLength();\r
-  UINTN ArmCacheLineAlignmentMask  = ArmCacheLineLength - 1;\r
-  UINTN ArmCacheOperationThreshold = PcdGet32(PcdArmCacheOperationThreshold);\r
-  \r
-  if ((CacheOperation != NULL) && (Length >= ArmCacheOperationThreshold)) {\r
-    CacheOperation ();\r
-  } else {\r
-    // Align address (rounding down)\r
-    UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
-    UINTN EndAddress     = (UINTN)Start + Length;\r
-\r
-    // Perform the line operation on an address in each cache line\r
-    while (AlignedAddress < EndAddress) {\r
-      LineOperation(AlignedAddress);\r
-      AlignedAddress += ArmCacheLineLength;\r
-    }\r
+  UINTN ArmCacheLineAlignmentMask  = LineLength - 1;\r
+\r
+  // Align address (rounding down)\r
+  UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
+  UINTN EndAddress     = (UINTN)Start + Length;\r
+\r
+  // Perform the line operation on an address in each cache line\r
+  while (AlignedAddress < EndAddress) {\r
+    LineOperation(AlignedAddress);\r
+    AlignedAddress += LineLength;\r
   }\r
+  ArmDataSynchronizationBarrier ();\r
 }\r
 \r
 VOID\r
@@ -48,8 +46,7 @@ InvalidateInstructionCache (
   VOID\r
   )\r
 {\r
-  ArmCleanDataCache();\r
-  ArmInvalidateInstructionCache();\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID\r
@@ -58,7 +55,7 @@ InvalidateDataCache (
   VOID\r
   )\r
 {\r
-  ArmInvalidateDataCache();\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID *\r
@@ -68,8 +65,14 @@ InvalidateInstructionCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation (Address, Length, ArmCleanDataCacheToPoU, ArmCleanDataCacheEntryByMVA);\r
-  ArmInvalidateInstructionCache ();\r
+  CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,\r
+    ArmDataCacheLineLength ());\r
+  CacheRangeOperation (Address, Length,\r
+    ArmInvalidateInstructionCacheEntryToPoUByMVA,\r
+    ArmInstructionCacheLineLength ());\r
+\r
+  ArmInstructionSynchronizationBarrier ();\r
+\r
   return Address;\r
 }\r
 \r
@@ -79,7 +82,7 @@ WriteBackInvalidateDataCache (
   VOID\r
   )\r
 {\r
-  ArmCleanInvalidateDataCache();\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID *\r
@@ -89,7 +92,8 @@ WriteBackInvalidateDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCache, ArmCleanInvalidateDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,\r
+    ArmDataCacheLineLength ());\r
   return Address;\r
 }\r
 \r
@@ -99,7 +103,7 @@ WriteBackDataCache (
   VOID\r
   )\r
 {\r
-  ArmCleanDataCache();\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID *\r
@@ -109,7 +113,8 @@ WriteBackDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanDataCache, ArmCleanDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,\r
+    ArmDataCacheLineLength ());\r
   return Address;\r
 }\r
 \r
@@ -120,6 +125,7 @@ InvalidateDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, NULL, ArmInvalidateDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,\r
+    ArmDataCacheLineLength ());\r
   return Address;\r
 }\r