Update remaining ARM .S files with INTERWORK_FUNC macro. This is the 2nd half of...

[mirror_edk2.git] / ArmPkg / Library / ArmLib / Arm11 / Arm11Support.S

diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S b/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S
index e3b7746317382804e7799fc5850764389cc2eb0c..8c2ce60f5a6a08e56c9b1a289782d85dd09f0976 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11Support.S
@@ -1,8 +1,8 @@
 #------------------------------------------------------------------------------ 
 #
-# Copyright (c) 2008-2009 Apple Inc. All rights reserved.
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
 #
-# All rights reserved. This program and the accompanying materials
+# This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD License
 # which accompanies this distribution.  The full text of the license may be found at
 # http://opensource.org/licenses/bsd-license.php
@@ -15,21 +15,44 @@
 .text
 .align 2
 .globl ASM_PFX(ArmCleanInvalidateDataCache)
+INTERWORK_FUNC(ArmCleanInvalidateDataCache)
 .globl ASM_PFX(ArmCleanDataCache)
+INTERWORK_FUNC(ArmCleanDataCache)
 .globl ASM_PFX(ArmInvalidateDataCache)
+INTERWORK_FUNC(ArmInvalidateDataCache)
 .globl ASM_PFX(ArmInvalidateInstructionCache)
+INTERWORK_FUNC(ArmInvalidateInstructionCache)
 .globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
+INTERWORK_FUNC(ArmInvalidateDataCacheEntryByMVA)
 .globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
+INTERWORK_FUNC(ArmCleanDataCacheEntryByMVA)
 .globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
+INTERWORK_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
 .globl ASM_PFX(ArmEnableMmu)
+INTERWORK_FUNC(ArmEnableMmu)
 .globl ASM_PFX(ArmDisableMmu)
+INTERWORK_FUNC(ArmDisableMmu)
 .globl ASM_PFX(ArmMmuEnabled)
+INTERWORK_FUNC(ArmMmuEnabled)
 .globl ASM_PFX(ArmEnableDataCache)
+INTERWORK_FUNC(ArmEnableDataCache)
 .globl ASM_PFX(ArmDisableDataCache)
+INTERWORK_FUNC(ArmDisableDataCache)
 .globl ASM_PFX(ArmEnableInstructionCache)
+INTERWORK_FUNC(ArmEnableInstructionCache)
 .globl ASM_PFX(ArmDisableInstructionCache)
+INTERWORK_FUNC(ArmDisableInstructionCache)
 .globl ASM_PFX(ArmEnableBranchPrediction)
+INTERWORK_FUNC(ArmEnableBranchPrediction)
 .globl ASM_PFX(ArmDisableBranchPrediction)
+INTERWORK_FUNC(ArmDisableBranchPrediction)
+.globl ASM_PFX(ArmDataMemoryBarrier)
+INTERWORK_FUNC(ArmDataMemoryBarrier)
+.globl ASM_PFX(ArmDataSyncronizationBarrier) 
+INTERWORK_FUNC(ArmDataSyncronizationBarrier)
+.globl ASM_PFX(ArmInstructionSynchronizationBarrier)
+INTERWORK_FUNC(ArmInstructionSynchronizationBarrier)
+
 
 .set DC_ON, (0x1<<2)
 .set IC_ON, (0x1<<12)
@@ -132,4 +155,20 @@ ASM_PFX(ArmDisableBranchPrediction):
   mcr     p15, 0, r0, c1, c0, 0
   bx      LR
 
+ASM_PFX(ArmDataMemoryBarrier):
+  mov R0, #0
+  mcr P15, #0, R0, C7, C10, #5 
+  bx      LR
+  
+ASM_PFX(ArmDataSyncronizationBarrier):
+  mov R0, #0
+  mcr P15, #0, R0, C7, C10, #4 
+  bx      LR
+  
+ASM_PFX(ArmInstructionSynchronizationBarrier):
+  mov R0, #0
+  mcr P15, #0, R0, C7, C5, #4 
+  bx      LR
+  
+
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED