#define ID_MMFR0_SHR_IMP_HW_COHERENT 1\r
#define ID_MMFR0_SHR_IGNORED 0xf\r
\r
+#define __EFI_MEMORY_RWX 0 // no restrictions\r
+\r
#define CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | \\r
EFI_MEMORY_WC | \\r
EFI_MEMORY_WT | \\r
IN UINT64 Length\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_XP);\r
}\r
\r
EFI_STATUS\r
IN UINT64 Length\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);\r
}\r
\r
EFI_STATUS\r
IN UINT64 Length\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_RO);\r
}\r
\r
EFI_STATUS\r
IN UINT64 Length\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);\r
}\r
\r
RETURN_STATUS\r