//\r
-// Copyright (c) 2012, ARM Limited. All rights reserved.\r
+// Copyright (c) 2012-2014, ARM Limited. All rights reserved.\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
.arch_extension sec\r
\r
GCC_ASM_EXPORT(ArmCallSmc)\r
-GCC_ASM_EXPORT(ArmCallSmcArg1)\r
-GCC_ASM_EXPORT(ArmCallSmcArg2)\r
-GCC_ASM_EXPORT(ArmCallSmcArg3)\r
\r
ASM_PFX(ArmCallSmc):\r
- push {r1}\r
- mov r1, r0\r
- ldr r0,[r1]\r
- smc #0\r
- str r0,[r1]\r
- pop {r1}\r
- bx lr\r
+ push {r4-r8}\r
+ // r0 will be popped just after the SMC call\r
+ push {r0}\r
\r
-ASM_PFX(ArmCallSmcArg1):\r
- push {r2-r3}\r
- mov r2, r0\r
- mov r3, r1\r
- ldr r0,[r2]\r
- ldr r1,[r3]\r
- smc #0\r
- str r0,[r2]\r
- str r1,[r3]\r
- pop {r2-r3}\r
- bx lr\r
+ // Load the SMC arguments values into the appropriate registers\r
+ ldr r7, [r0, #28]\r
+ ldr r6, [r0, #24]\r
+ ldr r5, [r0, #20]\r
+ ldr r4, [r0, #16]\r
+ ldr r3, [r0, #12]\r
+ ldr r2, [r0, #8]\r
+ ldr r1, [r0, #4]\r
+ ldr r0, [r0, #0]\r
\r
-ASM_PFX(ArmCallSmcArg2):\r
- push {r3-r5}\r
- mov r3, r0\r
- mov r4, r1\r
- mov r5, r2\r
- ldr r0,[r3]\r
- ldr r1,[r4]\r
- ldr r2,[r5]\r
smc #0\r
- str r0,[r3]\r
- str r1,[r4]\r
- str r2,[r5]\r
- pop {r3-r5}\r
- bx lr\r
\r
-ASM_PFX(ArmCallSmcArg3):\r
- push {r4-r7}\r
- mov r4, r0\r
- mov r5, r1\r
- mov r6, r2\r
- mov r7, r3\r
- ldr r0,[r4]\r
- ldr r1,[r5]\r
- ldr r2,[r6]\r
- ldr r3,[r7]\r
- smc #0\r
- str r0,[r4]\r
- str r1,[r5]\r
- str r2,[r6]\r
- str r3,[r7]\r
- pop {r4-r7}\r
+ // Pop the ARM_SMC_ARGS structure address from the stack into r8\r
+ pop {r8}\r
+\r
+ // Load the SMC returned values into the appropriate registers\r
+ // A SMC call can return up to 4 values - we do not need to store back r4-r7.\r
+ str r3, [r8, #12]\r
+ str r2, [r8, #8]\r
+ str r1, [r8, #4]\r
+ str r0, [r8, #0]\r
+\r
+ mov r0, r8\r
+\r
+ // Restore the registers r4-r8\r
+ pop {r4-r8}\r
+\r
bx lr\r