-;------------------------------------------------------------------------------ \r
+;------------------------------------------------------------------------------\r
;\r
; SetMem() worker for ARM\r
;\r
IN UINT8 Value\r
)\r
**/\r
-\s\s\r
-\s\sEXPORT InternalMemSetMem\r
-\s\s\r
-\s\sAREA AsmMemStuff, CODE, READONLY\r
\r
-InternalMemSetMem\r
-\s\sstmfd\s\ssp!, {r4-r11, lr}\r
-\s\stst\s\s r0, #3\r
-\s\smovne\s\sr3, #0\r
-\s\smoveq\s\sr3, #1\r
-\s\scmp\s\s r1, #31\r
-\s\smovls lr, #0\r
-\s\sandhi\s\slr, r3, #1\r
-\s\scmp\s\s lr, #0\r
-\s\smov\s\s r12, r0\r
-\s\sbne\s\s L31\r
+\r
+ INCLUDE AsmMacroExport.inc\r
+\r
+ RVCT_ASM_EXPORT InternalMemSetMem\r
+ stmfd sp!, {r4-r11, lr}\r
+ tst r0, #3\r
+ movne r3, #0\r
+ moveq r3, #1\r
+ cmp r1, #31\r
+ movls lr, #0\r
+ andhi lr, r3, #1\r
+ cmp lr, #0\r
+ mov r12, r0\r
+ bne L31\r
L32\r
-\s\smov\s\s r3, #0\r
-\s\sb\s\s L43\r
+ mov r3, #0\r
+ b L43\r
L31\r
and r4, r2, #0xff\r
orr r4, r4, r4, LSL #8\r
- orr r4, r4, r4, LSL #16 \r
-\s\smov r5, r4\r
-\s\smov r5, r4\r
-\s\smov r6, r4\r
-\s\smov r7, r4 \r
-\s\smov r8, r4 \r
-\s\smov r9, r4 \r
-\s\smov r10, r4 \r
-\s\smov r11, r4 \r
-\s\sb\s\s L32\r
+ orr r4, r4, r4, LSL #16\r
+ mov r5, r4\r
+ mov r6, r4\r
+ mov r7, r4\r
+ mov r8, r4\r
+ mov r9, r4\r
+ mov r10, r4\r
+ mov r11, r4\r
+ b L32\r
L34\r
-\s\scmp\s\s lr, #0\r
-\s\sstreqb\s\sr2, [r12], #1\r
-\s\ssubeq\s\s r1, r1, #1\r
-\s\sbeq\s\s L43\r
-\s\ssub\s\s r1, r1, #32\r
-\s\scmp\s\s r1, #31\r
-\s\smovls\s\s lr, r3\r
-\s\sstmia\s\s r12!, {r4-r11}\r
+ cmp lr, #0\r
+ streqb r2, [r12], #1\r
+ subeq r1, r1, #1\r
+ beq L43\r
+ sub r1, r1, #32\r
+ cmp r1, #31\r
+ movls lr, r3\r
+ stmia r12!, {r4-r11}\r
L43\r
-\s\scmp\s\s r1, #0\r
-\s\sbne\s\s L34\r
-\s\sldmfd\s\s sp!, {r4-r11, pc}\r
-\s\s\r
+ cmp r1, #0\r
+ bne L34\r
+ ldmfd sp!, {r4-r11, pc}\r
+\r
END\r
-
\ No newline at end of file