-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-.text
-.align 2
-
-.globl ASM_PFX(GccSemihostCall)
-INTERWORK_FUNC(GccSemihostCall)
-
-/*
- Semihosting operation request mechanism
-
- SVC 0x123456 in ARM state (for all architectures)
- SVC 0xAB in Thumb state (excluding ARMv7-M)
- BKPT 0xAB for ARMv7-M (Thumb-2 only)
-
- R0 - operation type
- R1 - block containing all other parametes
- */
-ASM_PFX(GccSemihostCall):
- svc #0x123456
- bx lr
-
-
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.text\r
+.align 2\r
+\r
+.globl ASM_PFX(GccSemihostCall)\r
+INTERWORK_FUNC(GccSemihostCall)\r
+\r
+/*\r
+ Semihosting operation request mechanism\r
+\r
+ SVC 0x123456 in ARM state (for all architectures)\r
+ SVC 0xAB in Thumb state (excluding ARMv7-M)\r
+ BKPT 0xAB for ARMv7-M (Thumb-2 only)\r
+\r
+ R0 - operation type\r
+ R1 - block containing all other parametes\r
+\r
+ lr - must be saved as svc instruction will cause an svc exception and write\r
+ the svc lr register. That happens to be the one we are using, so we must\r
+ save it or we will not be able to return.\r
+ */\r
+ASM_PFX(GccSemihostCall):\r
+ stmfd sp!, {lr}\r
+ svc #0x123456\r
+ ldmfd sp!, {lr}\r
+ bx lr\r
+\r
+\r