**/\r
UINT64\r
SmbiosProcessorGetCacheSize (\r
- IN UINT8 CacheLevel,\r
- IN BOOLEAN DataCache,\r
- IN BOOLEAN UnifiedCache\r
+ IN UINT8 CacheLevel,\r
+ IN BOOLEAN DataCache,\r
+ IN BOOLEAN UnifiedCache\r
)\r
{\r
- CCSIDR_DATA Ccsidr;\r
- CCSIDR2_DATA Ccsidr2;\r
- CSSELR_DATA Csselr;\r
- BOOLEAN CcidxSupported;\r
- UINT64 CacheSize;\r
+ CCSIDR_DATA Ccsidr;\r
+ CCSIDR2_DATA Ccsidr2;\r
+ CSSELR_DATA Csselr;\r
+ BOOLEAN CcidxSupported;\r
+ UINT64 CacheSize;\r
\r
// Read the CCSIDR register to get the cache architecture\r
- Csselr.Data = 0;\r
+ Csselr.Data = 0;\r
Csselr.Bits.Level = CacheLevel - 1;\r
- Csselr.Bits.InD = (!DataCache && !UnifiedCache);\r
+ Csselr.Bits.InD = (!DataCache && !UnifiedCache);\r
\r
Ccsidr.Data = ReadCCSIDR (Csselr.Data);\r
\r
\r
if (CcidxSupported) {\r
Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);\r
- CacheSize = (1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *\r
- (Ccsidr.BitsCcidxAA32.Associativity + 1) *\r
- (Ccsidr2.Bits.NumSets + 1);\r
+ CacheSize = (1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *\r
+ (Ccsidr.BitsCcidxAA32.Associativity + 1) *\r
+ (Ccsidr2.Bits.NumSets + 1);\r
} else {\r
CacheSize = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *\r
- (Ccsidr.BitsNonCcidx.Associativity + 1) *\r
- (Ccsidr.BitsNonCcidx.NumSets + 1);\r
+ (Ccsidr.BitsNonCcidx.Associativity + 1) *\r
+ (Ccsidr.BitsNonCcidx.NumSets + 1);\r
}\r
\r
return CacheSize;\r
**/\r
UINT32\r
SmbiosProcessorGetCacheAssociativity (\r
- IN UINT8 CacheLevel,\r
- IN BOOLEAN DataCache,\r
- IN BOOLEAN UnifiedCache\r
+ IN UINT8 CacheLevel,\r
+ IN BOOLEAN DataCache,\r
+ IN BOOLEAN UnifiedCache\r
)\r
{\r
CCSIDR_DATA Ccsidr;\r
UINT32 Associativity;\r
\r
// Read the CCSIDR register to get the cache architecture\r
- Csselr.Data = 0;\r
+ Csselr.Data = 0;\r
Csselr.Bits.Level = CacheLevel - 1;\r
- Csselr.Bits.InD = (!DataCache && !UnifiedCache);\r
+ Csselr.Bits.InD = (!DataCache && !UnifiedCache);\r
\r
Ccsidr.Data = ReadCCSIDR (Csselr.Data);\r
\r
\r
return Associativity;\r
}\r
-\r