#/** @file\r
#\r
-# Copyright (c) 2011-2018, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011-2021, ARM Limited. All rights reserved.\r
# Copyright (c) 2015, Intel Corporation. All rights reserved.\r
#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
#**/\r
\r
Include # Root include for the package\r
\r
[LibraryClasses]\r
+ ## @libraryclass Provides an interface to query platform information.\r
+ #\r
ArmPlatformLib|Include/Library/ArmPlatformLib.h\r
+\r
+ ## @libraryclass Provides an interface to initialize/shutdown a LCD screen.\r
+ #\r
LcdHwLib|Include/Library/LcdHwLib.h\r
+\r
+ ## @libraryclass Provides an interface to configure a LCD screen.\r
+ #\r
LcdPlatformLib|Include/Library/LcdPlatformLib.h\r
+\r
+ ## @libraryclass Provides a Nor flash interface.\r
+ #\r
NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h\r
+\r
+ ## @libraryclass Provides an interface to the clock of a PL011 device.\r
+ #\r
+ PL011UartClockLib|Include/Library/PL011UartClockLib.h\r
+\r
+ ## @libraryclass Provides an interface to a PL011 uart.\r
+ #\r
PL011UartLib|Include/Library/PL011UartLib.h\r
\r
[Guids.common]\r
## SP805 Watchdog\r
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023\r
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021\r
+ gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt|0|UINT32|0x0000002E\r
\r
## PL011 UART\r
gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F\r
gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026\r
gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027\r
\r
- ## PL180 MCI\r
- gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028\r
- gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029\r
+ ## Default size for display modes upto 1920x1080 (1920 * 1080 * 4 Bytes Per Pixel)\r
+ gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x7E9000|UINT32|0x00000043\r
+ ## If set, framebuffer memory will be reserved and mapped in the system RAM\r
+ gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x00000044\r
+\r
+ ## ARM Mali Display Processor DP500/DP550/DP650\r
+ gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x00000050\r
+ gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x00000051\r
\r
# Graphics Output Pixel format\r
# 0 : PixelRedGreenBlueReserved8BitPerColor\r