ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressLibRTSM / Arm / RTSMHelper.S

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
index e739050b0db513cf5f0fed64c41de432d610431c..35743b08dc8843ca3d33979573189cae1b24809b 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
@@ -12,32 +12,16 @@
 #\r
 \r
 #include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
 #include <Library/ArmLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <AutoGen.h>\r
-#include "AsmMacroIoLib.inc"\r
 \r
 #include <Chipset/ArmCortexA9.h>\r
 \r
-.text\r
-.align 2\r
-\r
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r
-GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)\r
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r
-\r
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)\r
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r
-\r
-ASM_PFX(ArmPlatformPeiBootAction):\r
+ASM_FUNC(ArmPlatformPeiBootAction)\r
   bx    lr\r
 \r
 # IN None\r
 # OUT r0 = SCU Base Address\r
-ASM_PFX(ArmGetScuBaseAddress):\r
+ASM_FUNC(ArmGetScuBaseAddress)\r
   # Read Configuration Base Address Register. ArmCBar cannot be called to get\r
   # the Configuration BAR as a stack is not necessary setup. The SCU is at the\r
   # offset 0x0000 from the Private Memory Region.\r
@@ -48,14 +32,13 @@ ASM_PFX(ArmGetScuBaseAddress):
 //ArmPlatformGetPrimaryCoreMpId (\r
 //  VOID\r
 //  );\r
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):\r
-  LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)\r
-  ldr   r0, [r0]\r
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)\r
+  MOV32  (r0, FixedPcdGet32 (PcdArmPrimaryCore))\r
   bx    lr\r
 \r
 # IN None\r
 # OUT r0 = number of cores present in the system\r
-ASM_PFX(ArmGetCpuCountPerCluster):\r
+ASM_FUNC(ArmGetCpuCountPerCluster)\r
   stmfd SP!, {r1-r2}\r
 \r
   # Read CP15 MIDR\r
@@ -63,10 +46,10 @@ ASM_PFX(ArmGetCpuCountPerCluster):
 \r
   # Check if the CPU is A15\r
   mov   r1, r1, LSR #4\r
-  LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)\r
+  MOV32 (r0, ARM_CPU_TYPE_MASK)\r
   and   r1, r1, r0\r
 \r
-  LoadConstantToReg (ARM_CPU_TYPE_A15, r0)\r
+  MOV32 (r0, ARM_CPU_TYPE_A15)\r
   cmp   r1, r0\r
   beq   _Read_cp15_reg\r
 \r
@@ -92,12 +75,10 @@ _Return:
 //ArmPlatformIsPrimaryCore (\r
 //  IN UINTN MpId\r
 //  );\r
-ASM_PFX(ArmPlatformIsPrimaryCore):\r
-  LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)\r
-  ldr   r1, [r1]\r
+ASM_FUNC(ArmPlatformIsPrimaryCore)\r
+  MOV32  (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))\r
   and   r0, r0, r1\r
-  LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)\r
-  ldr   r1, [r1]\r
+  MOV32  (r1, FixedPcdGet32 (PcdArmPrimaryCore))\r
   cmp   r0, r1\r
   moveq r0, #1\r
   movne r0, #0\r
@@ -107,7 +88,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
 //ArmPlatformGetCorePosition (\r
 //  IN UINTN MpId\r
 //  );\r
-ASM_PFX(ArmPlatformGetCorePosition):\r
+ASM_FUNC(ArmPlatformGetCorePosition)\r
   and   r1, r0, #ARM_CORE_MASK\r
   and   r0, r0, #ARM_CLUSTER_MASK\r
   add   r0, r1, r0, LSR #7\r