#include <Library/ArmLib.h>\r
#include <Library/PcdLib.h>\r
#include <AutoGen.h>\r
+#include "AsmMacroIoLib.inc"\r
\r
#include <Chipset/ArmCortexA9.h>\r
\r
.text\r
.align 2\r
\r
+GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)\r
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)\r
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r
\r
+ASM_PFX(ArmPlatformPeiBootAction):\r
+ bx lr\r
+\r
# IN None\r
# OUT r0 = SCU Base Address\r
ASM_PFX(ArmGetScuBaseAddress):\r
# the Configuration BAR as a stack is not necessary setup. The SCU is at the\r
# offset 0x0000 from the Private Memory Region.\r
mrc p15, 4, r0, c15, c0, 0\r
- bx lr\r
+ bx lr\r
\r
//UINTN\r
//ArmPlatformGetPrimaryCoreMpId (\r