+++ /dev/null
-/** @file\r
-*\r
-* Copyright (c) 2014, Linaro Limited. All rights reserved.\r
-*\r
-* This program and the accompanying materials\r
-* are licensed and made available under the terms and conditions of the BSD License\r
-* which accompanies this distribution. The full text of the license may be found at\r
-* http://opensource.org/licenses/bsd-license.php\r
-*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-*\r
-**/\r
-\r
-#include <Library/ArmPlatformLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <ArmPlatform.h>\r
-\r
-// Number of Virtual Memory Map Descriptors\r
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 2\r
-\r
-// DDR attributes\r
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
-\r
-EFI_PHYSICAL_ADDRESS\r
-ArmGetPhysAddrTop (\r
- VOID\r
- );\r
-\r
-/**\r
- Return the Virtual Memory Map of your platform\r
-\r
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU\r
- on your platform.\r
-\r
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR\r
- describing a Physical-to-Virtual Memory\r
- mapping. This array must be ended by a\r
- zero-filled entry\r
-\r
-**/\r
-VOID\r
-ArmPlatformGetVirtualMemoryMap (\r
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r
- )\r
-{\r
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
-\r
- ASSERT (VirtualMemoryMap != NULL);\r
-\r
- VirtualMemoryTable = AllocatePages (\r
- EFI_SIZE_TO_PAGES (\r
- sizeof (ARM_MEMORY_REGION_DESCRIPTOR)\r
- * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS\r
- )\r
- );\r
-\r
- if (VirtualMemoryTable == NULL) {\r
- DEBUG ((EFI_D_ERROR, "%a: Error: Failed AllocatePages()\n", __FUNCTION__));\r
- return;\r
- }\r
-\r
- //\r
- // Map the entire physical memory space as cached. The only device\r
- // we care about is the GIC, which will be stage 2 mapped as a device\r
- // by the hypervisor, which will override the cached mapping we install\r
- // here.\r
- //\r
- VirtualMemoryTable[0].PhysicalBase = 0x0;\r
- VirtualMemoryTable[0].VirtualBase = 0x0;\r
- VirtualMemoryTable[0].Length = ArmGetPhysAddrTop ();\r
- VirtualMemoryTable[0].Attributes = DDR_ATTRIBUTES_CACHED;\r
-\r
- // End of Table\r
- ZeroMem (&VirtualMemoryTable[1], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));\r
-\r
- *VirtualMemoryMap = VirtualMemoryTable;\r
-}\r