ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec: Update Juno R0 Device Tree default name

[mirror_edk2.git] / ArmPlatformPkg / Documentation / ArmPlatformPkg.txt

diff --git a/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt b/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt
index cbe56ffd1d0364d73216dfef1b553ec4b418972c..7a400cc2fb4fb2fed3482fbeadc8eaab1fa6220b 100644 (file)
--- a/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt
+++ b/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt
@@ -15,22 +15,22 @@ PCDs        Description :
 # Firmware Device / Volume\r
 gArmTokenSpaceGuid.PcdSecureFdBaseAddress       : Base address of your Secure Firmware Device \r
 gArmTokenSpaceGuid.PcdSecureFdSize              : Size in byte of your Secure Firmware Device.\r
-gArmTokenSpaceGuid.PcdNormalFdBaseAddress       : Base Address of your Non-Secure/Normal World Firmware Device.\r
-gArmTokenSpaceGuid.PcdNormalFdSize              : Size in bytes of your Non-Secure/Normal World Firmware Device \r
+gArmTokenSpaceGuid.PcdFdBaseAddress       : Base Address of your Non-Secure/Normal World Firmware Device.\r
+gArmTokenSpaceGuid.PcdFdSize              : Size in bytes of your Non-Secure/Normal World Firmware Device \r
 \r
 # Stacks\r
-gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase                   : Top of Secure Stack for Secure World\r
-gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize                    : Size of the stack for each of the 4 CPU cores\r
-gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase                : Top of Stack for Monitor World\r
-gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize                 : Size of the stack for each of the 4 CPU cores\r
-gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase                : Top of SEC Stack for Normal World\r
-gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize                : Size of the stack for each of the 4 CPU Cores\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase             : Base of Secure Stack for Secure World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize       : Size of the stack for the Primary Core in Secure World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize     : Size of the stack for the Secondary Cores in Secure World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase          : Base of Stack for Monitor World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize           : Size of the stack for each cores\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase                : Base of SEC Stack for Normal World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize          : Size of the stack for the Primary Core\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize        : Size of the stack for the Secondary Core\r
 \r
 # CPU / Architectural controllers\r
 gArmTokenSpaceGuid.PcdGicDistributorBase        : Base address of the Distributor of your General Interrupt Controller\r
 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller\r
-gArmPlatformTokenSpaceGuid.PcdMPCoreSupport     : Set to 1 when MP Core platforms\r
-gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores    : Maximum number of CPU cores on the platform (used for instance to know how many stacks we need to configure)\r
 \r
 # Memory Regions\r
 gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize  : Size of the region reserve for PI & UEFI\r
@@ -46,7 +46,6 @@ gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription      : Description of the D
 gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath       : DevicePath of the Default Boot Entry\r
 gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument         : Argument for the Default Boot Entry\r
 gArmPlatformTokenSpaceGuid.PcdDefaultBootType             : Define the binary type of the Default Boot Entry (0=EFI application, 1=Linux kernel with ATAG support, 2=Linux Kernel with FDT support)  \r
-gArmPlatformTokenSpaceGuid.PcdFdtDevicePath               : DevicePath of the Platform Device Tree\r
 gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut         : Timeout before booting on the Device Boot entry (by default the auto boot is skipped)\r
 gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths           : List of Device Path use for the Console Input\r
 gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths          : List of Device Path use for the Console Output\r
@@ -63,6 +62,11 @@ FAQ :
     Boot sequence: Sec/PrePiCore/PeiCore/Dxe/Bds\r
     Example: ARM Versatile Express\r
 \r
+See:\r
+- ArmPlatformPkg/Documentation/ARM-EDK2-Overview.png\r
+- ArmPlatformPkg/Documentation/ArmPlatformLib-Full-Boot.png\r
+- ArmPlatformPkg/Documentation/ArmPlatformLib-2nd-Stage.png\r
+\r
 # What is the PcdStandalone\r
 gArmPlatformTokenSpaceGuid.PcdStandalone=FALSE is used on ARM Development Platforms during the development stage.\r
 To avoid to reflash the NOR Flash after each build, the SEC (in NOR Flash) intializes thd DRAM and wait until the Normal World firmware is copied into the DRAM.\r