--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ **/\r
+\r
+#ifndef __LCDPLATFORMLIB_H\r
+#define __LCDPLATFORMLIB_H\r
+\r
+#include <Protocol/GraphicsOutput.h>\r
+\r
+#define LCD_VRAM_SIZE SIZE_8MB\r
+\r
+//\r
+// Modes definitions\r
+//\r
+#define VGA 0\r
+#define SVGA 1\r
+#define XGA 2\r
+#define SXGA 3\r
+#define UXGA 4\r
+#define HD 5\r
+\r
+//\r
+// VGA Mode: 640 x 480\r
+//\r
+#define VGA_H_RES_PIXELS 640\r
+#define VGA_V_RES_PIXELS 480\r
+#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */\r
+\r
+#define VGA_H_SYNC ( 80 - 1)\r
+#define VGA_H_FRONT_PORCH ( 16 - 1)\r
+#define VGA_H_BACK_PORCH ( 64 - 1)\r
+\r
+#define VGA_V_SYNC ( 4 - 1)\r
+#define VGA_V_FRONT_PORCH ( 3 - 1)\r
+#define VGA_V_BACK_PORCH ( 13 - 1)\r
+\r
+//\r
+// SVGA Mode: 800 x 600\r
+//\r
+#define SVGA_H_RES_PIXELS 800\r
+#define SVGA_V_RES_PIXELS 600\r
+#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */\r
+\r
+#define SVGA_H_SYNC ( 80 - 1)\r
+#define SVGA_H_FRONT_PORCH ( 32 - 1)\r
+#define SVGA_H_BACK_PORCH (112 - 1)\r
+\r
+#define SVGA_V_SYNC ( 4 - 1)\r
+#define SVGA_V_FRONT_PORCH ( 3 - 1)\r
+#define SVGA_V_BACK_PORCH ( 17 - 1)\r
+\r
+//\r
+// XGA Mode: 1024 x 768\r
+//\r
+#define XGA_H_RES_PIXELS 1024\r
+#define XGA_V_RES_PIXELS 768\r
+#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */\r
+\r
+#define XGA_H_SYNC (104 - 1)\r
+#define XGA_H_FRONT_PORCH ( 48 - 1)\r
+#define XGA_H_BACK_PORCH (152 - 1)\r
+\r
+#define XGA_V_SYNC ( 4 - 1)\r
+#define XGA_V_FRONT_PORCH ( 3 - 1)\r
+#define XGA_V_BACK_PORCH ( 23 - 1)\r
+\r
+//\r
+// SXGA Mode: 1280 x 1024\r
+//\r
+#define SXGA_H_RES_PIXELS 1280\r
+#define SXGA_V_RES_PIXELS 1024\r
+#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */\r
+\r
+#define SXGA_H_SYNC (136 - 1)\r
+#define SXGA_H_FRONT_PORCH ( 80 - 1)\r
+#define SXGA_H_BACK_PORCH (216 - 1)\r
+\r
+#define SXGA_V_SYNC ( 7 - 1)\r
+#define SXGA_V_FRONT_PORCH ( 3 - 1)\r
+#define SXGA_V_BACK_PORCH ( 29 - 1)\r
+\r
+//\r
+// UXGA Mode: 1600 x 1200\r
+//\r
+#define UXGA_H_RES_PIXELS 1600\r
+#define UXGA_V_RES_PIXELS 1200\r
+#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */\r
+\r
+#define UXGA_H_SYNC (168 - 1)\r
+#define UXGA_H_FRONT_PORCH (112 - 1)\r
+#define UXGA_H_BACK_PORCH (280 - 1)\r
+\r
+#define UXGA_V_SYNC ( 4 - 1)\r
+#define UXGA_V_FRONT_PORCH ( 3 - 1)\r
+#define UXGA_V_BACK_PORCH ( 38 - 1)\r
+\r
+//\r
+// HD Mode: 1920 x 1080\r
+//\r
+#define HD_H_RES_PIXELS 1920\r
+#define HD_V_RES_PIXELS 1080\r
+#define HD_OSC_FREQUENCY 173000000 /* 0x0A4FC540 */\r
+\r
+#define HD_H_SYNC (200 - 1)\r
+#define HD_H_FRONT_PORCH (128 - 1)\r
+#define HD_H_BACK_PORCH (328 - 1)\r
+\r
+#define HD_V_SYNC ( 5 - 1)\r
+#define HD_V_FRONT_PORCH ( 3 - 1)\r
+#define HD_V_BACK_PORCH ( 32 - 1)\r
+\r
+//\r
+// Colour Masks\r
+//\r
+\r
+#define LCD_24BPP_RED_MASK 0x00FF0000\r
+#define LCD_24BPP_GREEN_MASK 0x0000FF00\r
+#define LCD_24BPP_BLUE_MASK 0x000000FF\r
+#define LCD_24BPP_RESERVED_MASK 0xFF000000\r
+\r
+#define LCD_16BPP_555_RED_MASK 0x00007C00\r
+#define LCD_16BPP_555_GREEN_MASK 0x000003E0\r
+#define LCD_16BPP_555_BLUE_MASK 0x0000001F\r
+#define LCD_16BPP_555_RESERVED_MASK 0x00000000\r
+\r
+#define LCD_16BPP_565_RED_MASK 0x0000F800\r
+#define LCD_16BPP_565_GREEN_MASK 0x000007E0\r
+#define LCD_16BPP_565_BLUE_MASK 0x0000001F\r
+#define LCD_16BPP_565_RESERVED_MASK 0x00008000\r
+\r
+#define LCD_12BPP_444_RED_MASK 0x00000F00\r
+#define LCD_12BPP_444_GREEN_MASK 0x000000F0\r
+#define LCD_12BPP_444_BLUE_MASK 0x0000000F\r
+#define LCD_12BPP_444_RESERVED_MASK 0x0000F000\r
+\r
+\r
+// The enumeration indexes maps the PL111 LcdBpp values used in the LCD Control Register\r
+typedef enum {\r
+ LCD_BITS_PER_PIXEL_1 = 0,\r
+ LCD_BITS_PER_PIXEL_2,\r
+ LCD_BITS_PER_PIXEL_4,\r
+ LCD_BITS_PER_PIXEL_8,\r
+ LCD_BITS_PER_PIXEL_16_555,\r
+ LCD_BITS_PER_PIXEL_24,\r
+ LCD_BITS_PER_PIXEL_16_565,\r
+ LCD_BITS_PER_PIXEL_12_444\r
+} LCD_BPP;\r
+\r
+\r
+EFI_STATUS\r
+LcdPlatformInitializeDisplay (\r
+ VOID\r
+ );\r
+\r
+EFI_STATUS\r
+LcdPlatformGetVram (\r
+ OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,\r
+ OUT UINTN* VramSize\r
+ );\r
+\r
+UINT32\r
+LcdPlatformGetMaxMode (\r
+ VOID\r
+ );\r
+\r
+EFI_STATUS\r
+LcdPlatformSetMode (\r
+ IN UINT32 ModeNumber\r
+ );\r
+\r
+EFI_STATUS\r
+LcdPlatformQueryMode (\r
+ IN UINT32 ModeNumber,\r
+ OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info\r
+ );\r
+\r
+EFI_STATUS\r
+LcdPlatformGetTimings (\r
+ IN UINT32 ModeNumber,\r
+ OUT UINT32* HRes,\r
+ OUT UINT32* HSync,\r
+ OUT UINT32* HBackPorch,\r
+ OUT UINT32* HFrontPorch,\r
+ OUT UINT32* VRes,\r
+ OUT UINT32* VSync,\r
+ OUT UINT32* VBackPorch,\r
+ OUT UINT32* VFrontPorch\r
+ );\r
+\r
+EFI_STATUS\r
+LcdPlatformGetBpp (\r
+ IN UINT32 ModeNumber,\r
+ OUT LCD_BPP* Bpp\r
+ );\r
+\r
+#endif\r
projects / mirror_edk2.git / blobdiff