ArmPlatformPkg: move internal PL031 header into driver directory

[mirror_edk2.git] / ArmPlatformPkg / Library / PL031RealTimeClockLib / PL031RealTimeClock.h

diff --git a/ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClock.h b/ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClock.h
new file mode 100644 (file)
index 0000000..812cd9b
--- /dev/null
+++ b/ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClock.h
@@ -0,0 +1,45 @@
+/** @file\r
+*\r
+*  Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+*\r
+*  This program and the accompanying materials\r
+*  are licensed and made available under the terms and conditions of the BSD License\r
+*  which accompanies this distribution.  The full text of the license may be found at\r
+*  http://opensource.org/licenses/bsd-license.php\r
+*\r
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+*\r
+**/\r
+\r
+\r
+#ifndef __PL031_REAL_TIME_CLOCK_H__\r
+#define __PL031_REAL_TIME_CLOCK_H__\r
+\r
+// PL031 Registers\r
+#define PL031_RTC_DR_DATA_REGISTER                      0x000\r
+#define PL031_RTC_MR_MATCH_REGISTER                     0x004\r
+#define PL031_RTC_LR_LOAD_REGISTER                      0x008\r
+#define PL031_RTC_CR_CONTROL_REGISTER                   0x00C\r
+#define PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER      0x010\r
+#define PL031_RTC_RIS_RAW_IRQ_STATUS_REGISTER           0x014\r
+#define PL031_RTC_MIS_MASKED_IRQ_STATUS_REGISTER        0x018\r
+#define PL031_RTC_ICR_IRQ_CLEAR_REGISTER                0x01C\r
+#define PL031_RTC_PERIPH_ID0                            0xFE0\r
+#define PL031_RTC_PERIPH_ID1                            0xFE4\r
+#define PL031_RTC_PERIPH_ID2                            0xFE8\r
+#define PL031_RTC_PERIPH_ID3                            0xFEC\r
+#define PL031_RTC_PCELL_ID0                             0xFF0\r
+#define PL031_RTC_PCELL_ID1                             0xFF4\r
+#define PL031_RTC_PCELL_ID2                             0xFF8\r
+#define PL031_RTC_PCELL_ID3                             0xFFC\r
+\r
+// PL031 Values\r
+#define PL031_RTC_ENABLED                               0x00000001\r
+#define PL031_SET_IRQ_MASK                              0x00000001\r
+#define PL031_IRQ_TRIGGERED                             0x00000001\r
+#define PL031_CLEAR_IRQ                                 0x00000001\r
+\r
+#define PL031_COUNTS_PER_SECOND                         1\r
+\r
+#endif\r