/** @file\r
*\r
-* Copyright (c) 2011, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;\r
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;\r
\r
+ // Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned\r
+ // to ensure the stack pointer is 4-byte aligned.\r
+ TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));\r
+\r
//\r
// Bind this information into the SEC hand-off state\r
// Note: this must be in sync with the stuff in the asm file\r
SecCoreData.TemporaryRamSize = TemporaryRamSize;\r
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;\r
SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;\r
- SecCoreData.StackBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize/2));\r
- SecCoreData.StackSize = SecCoreData.TemporaryRamSize / 2;\r
+ SecCoreData.StackBase = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4);\r
+ SecCoreData.StackSize = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase;\r
\r
// Jump to PEI core entry point\r
(PeiCoreEntryPoint)(&SecCoreData, PpiList);\r