ARM Packages: Force the SEC modules to be 2K aligned for AArch64

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCore.c

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index 1abefaefd2991027ead3e89f9bdc9d90ea19c62b..f33f376cf124750acb5113e5d767691f4e29f9e0 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -1,7 +1,7 @@
 /** @file\r
 *  Main file supporting the transition to PEI Core in Normal World for Versatile Express\r
 *\r
-*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
@@ -86,8 +86,9 @@ CEntryPoint (
   //\r
 \r
   // Write VBAR - The Exception Vector table must be aligned to its requirement\r
-  //TODO: Fix baseTools to ensure the Exception Vector Table is correctly aligned in AArch64\r
-  //ASSERT(((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0);\r
+  // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure\r
+  // 'Align=4K' is defined into your FDF for this module.\r
+  ASSERT (((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0);\r
   ArmWriteVBar ((UINTN)PeiVectorTable);\r
 \r
   //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r