ARM Packages: Rename PcdNormal* into Pcd* PCDs

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCoreEntryPoint.asm

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
index de5fac15f8524a9181c80e1781ba00b230023b67..1694b905d0873568462ee4e7b9611724840fc4f1 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
@@ -19,6 +19,7 @@
   INCLUDE AsmMacroIoLib.inc\r
   \r
   IMPORT  CEntryPoint\r
+  IMPORT  ArmReadMpidr\r
   EXPORT  _ModuleEntryPoint\r
   \r
   PRESERVE8\r
@@ -28,22 +29,56 @@ StartupAddr        DCD      CEntryPoint
 \r
 _ModuleEntryPoint\r
   // Identify CPU ID\r
-  mrc   p15, 0, r0, c0, c0, 5\r
-  and   r0, #0xf\r
+  bl    ArmReadMpidr\r
+  // Get ID of this CPU in Multicore system\r
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
+  and   r0, r0, r1\r
 \r
-_SetupStack\r
-  // Setup Stack for the 4 CPU cores\r
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase) ,r1)\r
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize) ,r2)\r
-  \r
-  mov     r3,r0         // r3 = core_id\r
-  mul     r3,r3,r2      // r3 = core_id * stack_size = offset from the stack base\r
-  add     r3,r3,r1      // r3 = stack_base + offset\r
-  add     r3,r3,r2,LSR #1   // r3 = stack_offset + (stack_size/2)   <-- the top half is for the heap\r
-  mov     sp, r3\r
+  // Calculate the top of the primary stack\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+  add   r2, r2, r1\r
+\r
+  // Is it the Primary Core ?\r
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r1)\r
+  cmp   r0, r1\r
+  beq   _SetupPrimaryCoreStack\r
+\r
+_SetupSecondaryCoreStack\r
+  // r2 = Top of the primary stack = Base of the Secondary Stacks\r
+\r
+  // Get the position of the cores (ClusterId * 4) + CoreId\r
+  GetCorePositionInStack(r3, r0, r1)\r
+  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
+  add   r3, r3, #1\r
+\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
+  // StackOffset = CorePos * StackSize\r
+  mul   r3, r3, r1\r
+  // SP = StackBase + StackOffset\r
+  add   sp, r2, r3\r
 \r
+  b     _PrepareArguments\r
+\r
+_SetupPrimaryCoreStack\r
+  // r2 = Top of the primary stack\r
+  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r3)\r
+\r
+  // The reserved space for global variable must be 8-bytes aligned for pushing\r
+  // 64-bit variable on the stack\r
+  SetPrimaryStack (r2, r3, r1)\r
+\r
+  // Set all the PEI global variables to 0\r
+  mov   r3, sp\r
+  mov   r1, #0x0\r
+_InitGlobals\r
+  str   r1, [r3], #4\r
+  cmp   r3, r2\r
+  blt   _InitGlobals\r
+\r
+_PrepareArguments\r
   // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
-  LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)\r
+  LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
   add   r2, r2, #4\r
   ldr   r1, [r2]\r
 \r
@@ -52,8 +87,11 @@ _SetupStack
   ldr   r2, StartupAddr\r
 \r
   // jump to PrePeiCore C code\r
-  //    r0 = core_id\r
+  //    r0 = mp_id\r
   //    r1 = pei_core_address\r
   blx   r2\r
 \r
+_NeverReturn\r
+  b _NeverReturn\r
+\r
   END\r