\r
#include <Ppi/ArmMpCoreInfo.h>\r
\r
-EFI_STATUS\r
-GetPlatformPpi (\r
- IN EFI_GUID *PpiGuid,\r
- OUT VOID **Ppi\r
- )\r
-{\r
- UINTN PpiListSize;\r
- UINTN PpiListCount;\r
- EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
- UINTN Index;\r
-\r
- PpiListSize = 0;\r
- ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
- PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
- for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
- if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r
- *Ppi = PpiList->Ppi;\r
- return EFI_SUCCESS;\r
- }\r
- }\r
-\r
- return EFI_NOT_FOUND;\r
-}\r
-\r
VOID\r
PrimaryMain (\r
IN UINTN UefiMemoryBase,\r
IN UINT64 StartTimeStamp\r
)\r
{\r
- // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
- DEBUG_CODE_BEGIN();\r
- EFI_STATUS Status;\r
- ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;\r
-\r
- Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
- ASSERT_EFI_ERROR (Status);\r
- DEBUG_CODE_END();\r
-\r
// Check PcdGicPrimaryCoreId has been set in case the Primary Core is not the core 0 of Cluster 0\r
DEBUG_CODE_BEGIN();\r
if ((PcdGet32(PcdArmPrimaryCore) != 0) && (PcdGet32 (PcdGicPrimaryCoreId) == 0)) {\r
// Enable the GIC Distributor\r
ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
\r
- // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization\r
+ // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader to resume their initialization\r
if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {\r
// Sending SGI to all the Secondary CPU interfaces\r
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r