)\r
{\r
// Enable the GIC Distributor\r
- ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
+ ArmGicEnableDistributor(PcdGet64(PcdGicDistributorBase));\r
\r
// In some cases, the secondary cores are waiting for an SGI from the next stage boot loader to resume their initialization\r
if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {\r
// Sending SGI to all the Secondary CPU interfaces\r
- ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
+ ArmGicSendSgiTo (PcdGet64(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
}\r
\r
PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);\r
\r
// Acknowledge the interrupt and send End of Interrupt signal.\r
- AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);\r
+ AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), &InterruptId);\r
// Check if it is a valid interrupt ID\r
- if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {\r
+ if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet64 (PcdGicDistributorBase))) {\r
// Got a valid SGI number hence signal End of Interrupt\r
- ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);\r
+ ArmGicEndOfInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);\r
}\r
} while (SecondaryEntryAddr == 0);\r
\r