#========================================================================================\r
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
-# \r
-# This program and the accompanying materials \r
-# are licensed and made available under the terms and conditions of the BSD License \r
-# which accompanies this distribution. The full text of the license may be found at \r
-# http:#opensource.org/licenses/bsd-license.php \r
+# Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
#=======================================================================================\r
\r
#start of the code section\r
-.text \r
+.text\r
.align 3\r
\r
GCC_ASM_EXPORT(return_from_exception)\r
mov sp, r3 @ Set the stack of the Monitor Mode\r
\r
mov lr, r0 @ Use the pass entrypoint as lr\r
- \r
+\r
msr spsr_cxsf, r4 @ Use saved mode for the MOVS jump to the kernel\r
\r
mov r4, r0 @ Swap EntryPoint and MpId registers\r
\r
bx r4\r
\r
-# We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r
-# When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r
-# 'pc'; we will not change the CPSR flag and it will crash.\r
-# The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.\r
+# Return-from-exception is not an interworking return, so we must do it\r
+# in two steps, in case r0 has the Thumb bit set.\r
ASM_PFX(return_from_exception):\r
- ldr lr, returned_exception\r
-\r
- #The following instruction breaks the code.\r
- #movs pc, lr\r
- mrs r2, cpsr\r
- bic r2, r2, #0x1f\r
- orr r2, r2, #0x13\r
- msr cpsr_c, r2\r
-\r
+ adr lr, returned_exception\r
+ movs pc, lr\r
returned_exception: @ We are now in non-secure state\r
bx r0\r
\r
# Set the Non Secure Mode\r
ASM_PFX(set_non_secure_mode):\r
push { r1 }\r
- and r0, r0, #0x1f @ Keep only the mode bits\r
+ and r0, r0, #0x1f @ Keep only the mode bits\r
mrs r1, spsr @ Read the spsr\r
bic r1, r1, #0x1f @ Clear all mode bits\r
- orr r1, r1, r0\r
+ orr r1, r1, r0\r
msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)\r
isb\r
pop { r1 }\r
bx lr @ return (hopefully thumb-safe!)\r
\r
-dead:\r
- b dead\r
- \r
ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r