BaseTools: Clean up source files

[mirror_edk2.git] / BaseTools / Source / C / Include / IndustryStandard / pci22.h

diff --git a/BaseTools/Source/C/Include/IndustryStandard/pci22.h b/BaseTools/Source/C/Include/IndustryStandard/pci22.h
index 26c1541e399c79f581a37807b829e822b1d2967b..d7c5f0c858fabf3e3ce5e100913fd282a052931f 100644 (file)
--- a/BaseTools/Source/C/Include/IndustryStandard/pci22.h
+++ b/BaseTools/Source/C/Include/IndustryStandard/pci22.h
@@ -1,7 +1,7 @@
 /** @file\r
   Support for PCI 2.2 standard.\r
 \r
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 \r
   This program and the accompanying materials are licensed and made available\r
   under the terms and conditions of the BSD License which accompanies this\r
@@ -168,7 +168,7 @@ typedef struct {
 #define PCI_CLASS_BRIDGE_ISA_PDECODE  0x80\r
 #define PCI_CLASS_ISA_POSITIVE_DECODE 0x80  // obsolete\r
 \r
-#define PCI_CLASS_SCC                 0x07  // Simple communications controllers \r
+#define PCI_CLASS_SCC                 0x07  // Simple communications controllers\r
 #define PCI_SUBCLASS_SERIAL           0x00\r
 #define PCI_IF_GENERIC_XT             0x00\r
 #define PCI_IF_16450                  0x01\r
@@ -197,8 +197,8 @@ typedef struct {
 #define PCI_IF_8259_PIC               0x00\r
 #define PCI_IF_ISA_PIC                0x01\r
 #define PCI_IF_EISA_PIC               0x02\r
-#define PCI_IF_APIC_CONTROLLER        0x10 // I/O APIC interrupt controller , 32 bye none-prefectable memory.  \r
-#define PCI_IF_APIC_CONTROLLER2       0x20 \r
+#define PCI_IF_APIC_CONTROLLER        0x10 // I/O APIC interrupt controller , 32 bye none-prefectable memory.\r
+#define PCI_IF_APIC_CONTROLLER2       0x20\r
 #define PCI_SUBCLASS_TIMER            0x02\r
 #define PCI_IF_8254_TIMER             0x00\r
 #define PCI_IF_ISA_TIMER              0x01\r
@@ -249,7 +249,7 @@ typedef struct {
 \r
 #define PCI_SECURITY_CONTROLLER       0x10 // Encryption and decryption controller\r
 #define PCI_SUBCLASS_NET_COMPUT       0x00\r
-#define PCI_SUBCLASS_ENTERTAINMENT    0x10 \r
+#define PCI_SUBCLASS_ENTERTAINMENT    0x10\r
 \r
 #define PCI_CLASS_DPIO                0x11\r
 \r