orr r0, r0, #0x00000002 /* set bit 1 (A) Align */\r
orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */\r
mcr p15, 0, r0, c1, c0, 0\r
-\r
+ \r
// Set CPU vectors to start of DRAM\r
mov r0, #0x80000000\r
mcr p15, 0, r0, c12, c0, 0\r
-\r
- /* before we call C code, lets setup the stack pointer */\r
+ /* before we call C code, lets setup the stack pointer in internal RAM*/\r
stack_pointer_setup:\r
\r
//\r
LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */\r
add r4, r2, r3\r
\r
- //Enter IRQ mode and set up IRQ stack pointer\r
- mov r0,#0x12|0x80|0x40\r
- msr CPSR_c,r0\r
- mov r13,r4\r
-\r
- //Enter Abort mode and set up Abort stack pointer\r
- mov r0,#0x17|0x80|0x40\r
- msr CPSR_c,r0\r
- sub r4, r4, #0x400\r
- mov r13,r4\r
-\r
- //Enter Undefined mode and set up Undefined stack pointer\r
- mov r0,#0x1b|0x80|0x40\r
- msr CPSR_c,r0\r
- sub r4, r4, #0x400\r
- mov r13,r4\r
-\r
//Enter SVC mode and set up SVC stack pointer\r
mov r0,#0x13|0x80|0x40\r
msr CPSR_c,r0\r
- sub r4, r4, #0x400\r
- mov r13,r4\r
-\r
- //Enter System mode and set up System stack pointer\r
- mov r0,#0x1f|0x80|0x40\r
- msr CPSR_c,r0\r
- sub r4, r4, #0x400\r
mov r13,r4\r
\r
// Call C entry point\r
LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */\r
LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */\r
- \r
-\r
- blx ASM_PFX(CEntryPoint) /* Assume C code is ARM */\r
+ blx ASM_PFX(CEntryPoint) /* Assume C code is thumb */\r
\r
ShouldNeverGetHere:\r
/* _CEntryPoint should never return */\r
b ShouldNeverGetHere\r
-\r
\r