ArmVirtPkg/FdtParser: avoid unaligned accesses with the MMU off

[mirror_edk2.git] / BeagleBoardPkg / Sec / Cache.c

diff --git a/BeagleBoardPkg/Sec/Cache.c b/BeagleBoardPkg/Sec/Cache.c
index 12b585e7cf92fb42bf64c1389192990992354aa7..7399eef5be7cd09776dae8c5326a95524fb77a26 100644 (file)
--- a/BeagleBoardPkg/Sec/Cache.c
+++ b/BeagleBoardPkg/Sec/Cache.c
@@ -1,8 +1,8 @@
 /** @file\r
 \r
-  Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
-  \r
-  All rights reserved. This program and the accompanying materials\r
+  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+\r
+  This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   http://opensource.org/licenses/bsd-license.php\r
@@ -60,7 +60,7 @@ InitCache (
   MemoryTable[1].VirtualBase  = SOC_REGISTERS_L3_PHYSICAL_BASE;\r
   MemoryTable[1].Length       = SOC_REGISTERS_L3_PHYSICAL_LENGTH;\r
   MemoryTable[1].Attributes   = SOC_REGISTERS_L3_ATTRIBUTES;\r
-  \r
+\r
   // SOC Registers. L4 interconnects\r
   MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
   MemoryTable[2].VirtualBase  = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
@@ -72,8 +72,8 @@ InitCache (
   MemoryTable[3].VirtualBase  = 0;\r
   MemoryTable[3].Length       = 0;\r
   MemoryTable[3].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
-  \r
+\r
   ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
-  \r
+\r
   BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
 }\r