Use REPORT_STATUS_CODExxx() macros directly.

[mirror_edk2.git] / BeagleBoardPkg / Sec / Clock.c

diff --git a/BeagleBoardPkg/Sec/Clock.c b/BeagleBoardPkg/Sec/Clock.c
index 2d814e49e990c60d640ef5c5d78af84f3a4ff3c7..8de24f851c98ce634ac5699c8af22b8b185b1a56 100644 (file)
--- a/BeagleBoardPkg/Sec/Clock.c
+++ b/BeagleBoardPkg/Sec/Clock.c
@@ -1,8 +1,8 @@
 /** @file\r
 \r
-  Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
+  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
   \r
-  All rights reserved. This program and the accompanying materials\r
+  This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   http://opensource.org/licenses/bsd-license.php\r
@@ -25,9 +25,9 @@ ClockInit (
   //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.\r
 \r
   // Enable PLL5 and set to 120 MHz as a reference clock.\r
-  MmioWrite32(CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));\r
-  MmioWrite32(CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));\r
-  MmioWrite32(CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);\r
+  MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));\r
+  MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));\r
+  MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);\r
 \r
   // Turn on functional & interface clocks to the USBHOST power domain\r
   MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE\r