#include <Library/IoLib.h>\r
#include <Library/OmapLib.h>\r
#include <Library/ArmLib.h>\r
+#include <Library/PeCoffGetEntryPointLib.h>\r
\r
#include <Ppi/GuidedSectionExtraction.h>\r
-\r
+#include <Guid/LzmaDecompress.h>\r
#include <Omap3530/Omap3530.h>\r
\r
+#include "LzmaDecompress.h"\r
+\r
+VOID\r
+EFIAPI \r
+_ModuleEntryPoint(\r
+ VOID\r
+ );\r
+\r
+CHAR8 *\r
+DeCygwinPathIfNeeded (\r
+ IN CHAR8 *Name\r
+ );\r
+\r
VOID\r
PadConfiguration (\r
VOID\r
| CM_CLKSEL_PER_CLKSEL_GPT4_SYS);\r
\r
// Set count & reload registers\r
- MmioWrite32(TimerBaseAddress + GPTIMER_TCRR, 0x00000000);\r
- MmioWrite32(TimerBaseAddress + GPTIMER_TLDR, 0x00000000);\r
+ MmioWrite32 (TimerBaseAddress + GPTIMER_TCRR, 0x00000000);\r
+ MmioWrite32 (TimerBaseAddress + GPTIMER_TLDR, 0x00000000);\r
\r
// Disable interrupts\r
- MmioWrite32(TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);\r
+ MmioWrite32 (TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);\r
\r
// Start Timer\r
- MmioWrite32(TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);\r
+ MmioWrite32 (TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);\r
\r
//Disable OMAP Watchdog timer (WDT2)\r
- MmioWrite32(WDTIMER2_BASE + WSPR, 0xAAAA);\r
+ MmioWrite32 (WDTIMER2_BASE + WSPR, 0xAAAA);\r
DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));\r
- MmioWrite32(WDTIMER2_BASE + WSPR, 0x5555);\r
+ MmioWrite32 (WDTIMER2_BASE + WSPR, 0x5555);\r
}\r
\r
VOID\r
UINT32 UartBaseAddress = UartBase(Uart);\r
\r
// Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.\r
- MmioWrite32(UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);\r
+ MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);\r
\r
// Put device in configuration mode.\r
- MmioWrite32(UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);\r
+ MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);\r
\r
// Programmable divisor N = 48Mhz/16/115200 = 26\r
- MmioWrite32(UartBaseAddress + UART_DLL_REG, 26); // low divisor\r
- MmioWrite32(UartBaseAddress + UART_DLH_REG, 0); // high divisor\r
+ MmioWrite32 (UartBaseAddress + UART_DLL_REG, 3000000/FixedPcdGet64 (PcdUartDefaultBaudRate)); // low divisor\r
+ MmioWrite32 (UartBaseAddress + UART_DLH_REG, 0); // high divisor\r
\r
// Enter into UART operational mode.\r
- MmioWrite32(UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);\r
+ MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);\r
\r
// Force DTR and RTS output to active\r
- MmioWrite32(UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);\r
+ MmioWrite32 (UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);\r
\r
// Clear & enable fifos\r
- MmioWrite32(UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE); \r
+ MmioWrite32 (UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE); \r
\r
// Restore MODE_SELECT \r
- MmioWrite32(UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);\r
+ MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);\r
}\r
\r
VOID\r
VOID\r
);\r
\r
+/**\r
+ If the build is done on cygwin the paths are cygpaths. \r
+ /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert\r
+ them to work with RVD commands\r
+\r
+ This is just code to help print out RVD symbol load command.\r
+ If you build with cygwin paths aren't compatible with RVD.\r
+\r
+ @param Name Path to convert if needed\r
+\r
+**/\r
+CHAR8 *\r
+SecDeCygwinPathIfNeeded (\r
+ IN CHAR8 *Name\r
+ )\r
+{\r
+ CHAR8 *Ptr;\r
+ UINTN Index;\r
+ UINTN Len;\r
+ \r
+ Ptr = AsciiStrStr (Name, "/cygdrive/");\r
+ if (Ptr == NULL) {\r
+ return Name;\r
+ }\r
+ \r
+ Len = AsciiStrLen (Ptr);\r
+ \r
+ // convert "/cygdrive" to spaces\r
+ for (Index = 0; Index < 9; Index++) {\r
+ Ptr[Index] = ' ';\r
+ }\r
+\r
+ // convert /c to c:\r
+ Ptr[9] = Ptr[10];\r
+ Ptr[10] = ':';\r
+ \r
+ // switch path seperators\r
+ for (Index = 11; Index < Len; Index++) {\r
+ if (Ptr[Index] == '/') {\r
+ Ptr[Index] = '\\' ;\r
+ }\r
+ }\r
+\r
+ return Name;\r
+}\r
+\r
+\r
VOID\r
CEntryPoint (\r
IN VOID *MemoryBase,\r
{\r
VOID *HobBase;\r
\r
+ // Build a basic HOB list\r
+ HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));\r
+ CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);\r
+\r
//Set up Pin muxing.\r
- PadConfiguration();\r
+ PadConfiguration ();\r
\r
// Set up system clocking\r
- ClockInit();\r
+ ClockInit ();\r
\r
- // Build a basic HOB list\r
- HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));\r
- CreateHobList(MemoryBase, MemorySize, HobBase, StackBase);\r
\r
// Enable program flow prediction, if supported.\r
- ArmEnableBranchPrediction();\r
+ ArmEnableBranchPrediction ();\r
\r
// Initialize CPU cache\r
- InitCache((UINT32)MemoryBase, (UINT32)MemorySize);\r
+ InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);\r
\r
// Add memory allocation hob for relocated FD\r
- BuildMemoryAllocationHob(FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);\r
+ BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);\r
\r
// Add the FVs to the hob list\r
- BuildFvHob(PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));\r
+ BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));\r
\r
// Start talking\r
- UartInit();\r
- DEBUG((EFI_D_ERROR, "UART Test Line\n"));\r
+ UartInit ();\r
+ DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r
+\r
+ DEBUG_CODE_BEGIN ();\r
+ //\r
+ // On a debug build print out information about the SEC. This is really info about\r
+ // the PE/COFF file we are currently running from. Useful for loading symbols in a\r
+ // debugger. Remember our image is really part of the FV.\r
+ //\r
+ RETURN_STATUS Status;\r
+ EFI_PEI_FV_HANDLE VolumeHandle;\r
+ EFI_PEI_FILE_HANDLE FileHandle;\r
+ VOID *PeCoffImage;\r
+ UINT32 Offset;\r
+ CHAR8 *FilePath;\r
+ FfsAnyFvFindFirstFile (EFI_FV_FILETYPE_SECURITY_CORE, &VolumeHandle, &FileHandle);\r
+ Status = FfsFindSectionData (EFI_SECTION_TE, FileHandle, &PeCoffImage);\r
+ if (EFI_ERROR (Status)) {\r
+ // Usually is a TE (PI striped down PE/COFF), but could be a full PE/COFF\r
+ Status = FfsFindSectionData (EFI_SECTION_PE32, FileHandle, &PeCoffImage);\r
+ }\r
+ if (!EFI_ERROR (Status)) {\r
+ Offset = PeCoffGetSizeOfHeaders (PeCoffImage);\r
+ FilePath = PeCoffLoaderGetPdbPointer (PeCoffImage);\r
+ if (FilePath != NULL) {\r
+ \r
+ // \r
+ // In general you should never have to use #ifdef __CC_ARM in the code. It\r
+ // is hidden in the away in the MdePkg. But here we would like to print differnt things\r
+ // for different toolchains. \r
+ //\r
+#ifdef __CC_ARM\r
+ // Print out the command for the RVD debugger to load symbols for this image\r
+ DEBUG ((EFI_D_ERROR, "load /a /ni /np %a &0x%08x\n", SecDeCygwinPathIfNeeded (FilePath), (CHAR8 *)PeCoffImage + Offset));\r
+#elif __GNUC__\r
+ // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required\r
+ DEBUG ((EFI_D_ERROR, "add-symbol-file %a 0x%08x\n", FilePath, PeCoffImage + Offset));\r
+#else\r
+ DEBUG ((EFI_D_ERROR, "SEC starts at 0x%08x with an entry point at 0x%08x %a\n", PeCoffImage, _ModuleEntryPoint, FilePath));\r
+#endif\r
+ }\r
+ }\r
+\r
+ \r
+ DEBUG_CODE_END ();\r
+\r
+\r
\r
// Start up a free running time so that the timer lib will work\r
- TimerInit();\r
+ TimerInit ();\r
\r
// SEC phase needs to run library constructors by hand.\r
- ExtractGuidedSectionLibConstructor();\r
- LzmaDecompressLibConstructor();\r
+ ExtractGuidedSectionLibConstructor ();\r
+ LzmaDecompressLibConstructor ();\r
+\r
+ // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
+ BuildPeCoffLoaderHob ();\r
+ BuildExtractSectionHob (\r
+ &gLzmaCustomDecompressGuid,\r
+ LzmaGuidedSectionGetInfo,\r
+ LzmaGuidedSectionExtraction\r
+ );\r
+\r
+ // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
+ DecompressFirstFv ();\r
\r
// Load the DXE Core and transfer control to it\r
- LoadDxeCoreFromFv(NULL, 0);\r
+ LoadDxeCoreFromFv (NULL, 0);\r
\r
// DXE Core should always load and never return\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
\r
projects / mirror_edk2.git / blobdiff