#------------------------------------------------------------------------------\r
#*\r
-#* Copyright 2006 - 2007, Intel Corporation \r
-#* All rights reserved. This program and the accompanying materials \r
+#* Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>\r
+#* This program and the accompanying materials \r
#* are licensed and made available under the terms and conditions of the BSD License \r
#* which accompanies this distribution. The full text of the license may be found at \r
#* http://opensource.org/licenses/bsd-license.php \r
.stack: \r
.486p: \r
.code16\r
- \r
+ \r
.equ FAT_DIRECTORY_ENTRY_SIZE, 0x020\r
.equ FAT_DIRECTORY_ENTRY_SHIFT, 5\r
.equ BLOCK_SIZE, 0x0200\r
.equ BLOCK_SHIFT, 9\r
\r
.org 0x0\r
+\r
+.global _start\r
+_start:\r
+\r
Ia32Jump: \r
jmp BootSectorEntryPoint # JMP inst - 3 bytes\r
nop\r
\r
ReadBlocks: \r
pusha\r
- addl LBAOffsetForBootSector(%bp), %eax # Add LBAOffsetForBootSector to Start LBA\r
+ addl LBAOffsetForBootSector(%bp), %eax # Add LBAOffsetForBootSector to Start LBA\r
addl HiddenSectors(%bp), %eax # Add HiddenSectors to Start LBA\r
movl %eax, %esi # esi = Start LBA\r
movw %bx, %cx # cx = Number of blocks to read\r
.equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port\r
.equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20\r
\r
- #.org 0x200\r
+ .org 0x200\r
jmp start\r
Em64String: \r
.byte 'E', 0x0c, 'm', 0x0c, '6', 0x0c, '4', 0x0c, 'T', 0x0c, ' ', 0x0c, 'U', 0x0c, 'n', 0x0c, 's', 0x0c, 'u', 0x0c, 'p', 0x0c, 'p', 0x0c, 'o', 0x0c, 'r', 0x0c, 't', 0x0c, 'e', 0x0c, 'd', 0x0c, '!', 0x0c\r
xorl %ebx, %ebx\r
movw %cs, %bx # BX=segment\r
shll $4, %ebx # BX="linear" address of segment base\r
- leal GDT_BASE(%ebx), %eax #\r
- movl %eax, (gdtr + 2) #\r
- leal IDT_BASE(%ebx), %eax #\r
- movl %eax, (idtr + 2) #\r
- leal MemoryMapSize(%ebx), %edx #\r
+ leal GDT_BASE(%ebx), %eax # EAX=PHYSICAL address of gdt\r
+ movl %eax, (gdtr + 2) # Put address of gdt into the gdtr\r
+ leal IDT_BASE(%ebx), %eax # EAX=PHYSICAL address of idt\r
+ movl %eax, (idtr + 2) # Put address of idt into the idtr\r
+ leal MemoryMapSize(%ebx), %edx # Physical base address of the memory map\r
\r
addl $0x1000, %ebx # Source of EFI32\r
movl %ebx, JUMP+2\r
# data\r
##############################################################################\r
\r
- .align 0x2\r
+ .p2align 1\r
\r
gdtr: .long GDT_END - GDT_BASE - 1 # GDT limit \r
.long 0 # (GDT base gets set above)\r
# global descriptor table (GDT)\r
##############################################################################\r
\r
- .align 0x2\r
+ .p2align 1\r
\r
GDT_BASE: \r
# null descriptor\r
\r
GDT_END: \r
\r
- .align 0x2\r
+ .p2align 1\r
\r
\r
\r
##############################################################################\r
\r
#idt_tag db "IDT",0 \r
- .align 0x2\r
+ .p2align 1\r
\r
IDT_BASE: \r
# divide by zero (INT 0)\r
.word 0 # offset 31:16\r
\r
# 85 unspecified descriptors, First 12 of them are reserved, the rest are avail\r
- .fill 85 * 8, 1, 0 # db (85 * 8) dup(0)\r
+ .fill 85 * 8, 1, 0 # db (85 * 8) dup(0)\r
\r
# IRQ 0 (System timer) - (INT 0x68)\r
.equ IRQ0_SEL, .-IDT_BASE\r
\r
IDT_END: \r
\r
- .align 0x2\r
+ .p2align 1\r
\r
MemoryMapSize: .long 0\r
MemoryMap: .long 0,0,0,0,0,0,0,0\r