#------------------------------------------------------------------------------\r
#*\r
-#* Copyright 2006 - 2007, Intel Corporation \r
-#* All rights reserved. This program and the accompanying materials \r
+#* Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+#* This program and the accompanying materials \r
#* are licensed and made available under the terms and conditions of the BSD License \r
#* which accompanies this distribution. The full text of the license may be found at \r
#* http://opensource.org/licenses/bsd-license.php \r
.equ BLOCK_SHIFT, 9\r
\r
.org 0x0\r
+\r
+.global _start\r
+_start:\r
+\r
Ia32Jump: \r
jmp BootSectorEntryPoint # JMP inst - 3 bytes\r
nop\r
\r
BootSectorEntryPoint: \r
# ASSUME ds:@code"\r
- # ASSUME ss:@code"\r
+ # ASSUME ss:@code"\r
# ds = 1000, es = 2000 + x (size of first cluster >> 4)\r
# cx = Start Cluster of EfiLdr\r
# dx = Start Cluster of Efivar.bin\r
NoVarStore: \r
pushw %es\r
# Set the 5th byte start @ 0:19000 to non-zero indicating we should init var store header in DxeIpl\r
- movb %al, %es:(4)\r
+ movb %al, %es:(4)\r
jmp SaveVolumeId\r
\r
CheckVarStoreSize: \r
LoadVarStore: \r
movb $0,%al\r
movb %al, %es:(4)\r
- movw (%di), %cx\r
+ movw (%di), %cx\r
# ES:DI = 1500:0\r
xorw %di,%di\r
pushw %es\r
movw VolId(%bp), %ax\r
movw %ax, %es:(0) \r
movw VolId+2(%bp), %ax\r
- movw %ax, %es:(2)\r
+ movw %ax, %es:(2)\r
\r
# Read Efildr\r
popw %cx\r
movw $18,%cx\r
jmp PrintStringAndHalt\r
CheckEm64TPass: \r
-jumpFarInstruction: \r
+JumpFarInstruction: \r
.byte 0xea\r
-jumpOffset: \r
+JumpOffset: \r
.word 0x200\r
-jumpSegment: \r
+JumpSegment: \r
.word 0x2000\r
\r
\r
pushw %si # Save si\r
movw %ax,%si # si = FatOffset\r
shrw $BLOCK_SHIFT, %ax # ax = FatOffset >> BLOCK_SHIFT\r
- addw ReservedSectors(%bp), %ax # ax = FatSectorNumber = ReservedSectors + (FatOffset >> BLOCK_OFFSET)\r
+ addw ReservedSectors(%bp), %ax # ax = FatSectorNumber = ReservedSectors + (FatOffset >> BLOCK_OFFSET)\r
andw $BLOCK_MASK, %si # si = FatOffset & BLOCK_MASK\r
cmpw %dx,%ax # Compare FatSectorNumber to CachedFatSectorNumber\r
je SkipFatRead\r
popw %es\r
movw %ax,%dx # CachedFatSectorNumber = FatSectorNumber\r
SkipFatRead: \r
- movw (%si), %bx # bx = NextClusterNumber\r
+ movw (%si), %bx # bx = NextClusterNumber\r
movw %cx,%ax # ax = ClusterNumber\r
andw $1,%ax # See if this is an odd cluster number\r
je EvenFatEntry\r
movw %bx,%cx # ClusterNumber = NextClusterNumber\r
subw $2,%ax # ax = StartCluster - 2\r
xorb %bh,%bh\r
- movb SectorsPerCluster(%bp), %bl # bx = SectorsPerCluster\r
+ movb SectorsPerCluster(%bp), %bl # bx = SectorsPerCluster\r
mulw %bx # ax = (StartCluster - 2) * SectorsPerCluster\r
- addw (%bp), %ax # ax = FirstClusterLBA + (StartCluster-2)*SectorsPerCluster\r
+ addw (%bp), %ax # ax = FirstClusterLBA + (StartCluster-2)*SectorsPerCluster\r
pushw %ax # save start sector\r
movw %si,%ax # ax = NumberOfClusters\r
mulw %bx # ax = NumberOfClusters * SectorsPerCluster\r
divl %ebx # ax = StartLBA / MaxSector\r
incw %dx # dx = (StartLBA % MaxSector) + 1\r
\r
- movw (%bp), %bx # bx = MaxSector\r
+ movw (%bp), %bx # bx = MaxSector\r
subw %dx,%bx # bx = MaxSector - Sector\r
incw %bx # bx = MaxSector - Sector + 1\r
cmpw %bx,%cx # Compare (Blocks) to (MaxSector - Sector + 1)\r
ErrorString: \r
.byte 'S', 0x0c, 'E', 0x0c, 'r', 0x0c, 'r', 0x0c, 'o', 0x0c, 'r', 0x0c, '!',0x0c\r
\r
- .org 0x01fa\r
+ .org 0x01fa\r
LBAOffsetForBootSector: \r
.long 0x0\r
\r
- .org 0x01fe\r
+ .org 0x01fe\r
.word 0xaa55\r
\r
#******************************************************************************\r
.equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port\r
.equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20\r
\r
- .org 0x200\r
+ .org 0x200\r
jmp start\r
Em64String: \r
.byte 'E', 0x0c, 'm', 0x0c, '6', 0x0c, '4', 0x0c, 'T', 0x0c, ' ', 0x0c, 'U', 0x0c, 'n', 0x0c, 's', 0x0c, 'u', 0x0c, 'p', 0x0c, 'p', 0x0c, 'o', 0x0c, 'r', 0x0c, 't', 0x0c, 'e', 0x0c, 'd', 0x0c, '!', 0x0c\r
MemMapDone: \r
leal MemoryMap, %eax\r
subl %eax,%edi # Get the address of the memory map\r
- movl %edi, MemoryMapSize # Save the size of the memory map\r
+ movl %edi, MemoryMapSize # Save the size of the memory map\r
\r
xorl %ebx,%ebx\r
movw %cs,%bx # BX=segment\r
\r
leal OffsetIn32BitProtectedMode, %eax\r
addl $0x20000+0x6,%eax\r
- movl %eax, OffsetIn32BitProtectedMode \r
+ movl %eax, OffsetIn32BitProtectedMode \r
\r
leal OffsetInLongMode, %eax\r
addl $0x20000+0x6,%eax\r
#\r
# Enable paging to activate long mode (set CR0.PG=1)\r
#\r
- movl $cr0, %eax # Read CR0.\r
+ movl %cr0, %eax # Read CR0.\r
.byte 0xf\r
.byte 0xba\r
.byte 0xe8\r
# data\r
##############################################################################\r
\r
- .align 0x2\r
+ .p2align 1\r
\r
- gdtr: .long GDT_END - GDT_BASE - 1 # GDT limit \r
+ gdtr: .long GDT_END - GDT_BASE - 1 # GDT limit \r
.long 0 # (GDT base gets set above)\r
##############################################################################\r
# global descriptor table (GDT)\r
##############################################################################\r
\r
- .align 0x2\r
+ .p2align 1\r
\r
GDT_BASE: \r
# null descriptor\r
\r
GDT_END: \r
\r
- .align 0x2\r
+ .p2align 1\r
\r
\r
\r
##############################################################################\r
\r
#idt_tag db "IDT",0 \r
- .align 0x2\r
+ .p2align 1\r
\r
\r
IDT_BASE: \r
# divide by zero (INT 0)\r
.equ DIV_ZERO_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# debug exception (INT 1)\r
.equ DEBUG_EXCEPT_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# NMI (INT 2)\r
.equ NMI_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# soft breakpoint (INT 3)\r
.equ BREAKPOINT_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# overflow (INT 4)\r
.equ OVERFLOW_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# bounds check (INT 5)\r
.equ BOUNDS_CHECK_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# invalid opcode (INT 6)\r
.equ INVALID_OPCODE_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# device not available (INT 7)\r
.equ DEV_NOT_AVAIL_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# double fault (INT 8)\r
.equ DOUBLE_FAULT_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# Coprocessor segment overrun - reserved (INT 9)\r
.equ RSVD_INTR_SEL1, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# invalid TSS (INT 0ah)\r
.equ INVALID_TSS_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# segment not present (INT 0bh)\r
.equ SEG_NOT_PRESENT_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# stack fault (INT 0ch)\r
.equ STACK_FAULT_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# general protection (INT 0dh)\r
.equ GP_FAULT_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# page fault (INT 0eh)\r
.equ PAGE_FAULT_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# Intel reserved - do not use (INT 0fh)\r
.equ RSVD_INTR_SEL2, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# floating point error (INT 10h)\r
.equ FLT_POINT_ERR_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# alignment check (INT 11h)\r
.equ ALIGNMENT_CHECK_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# machine check (INT 12h)\r
.equ MACHINE_CHECK_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# SIMD floating-point exception (INT 13h)\r
.equ SIMD_EXCEPTION_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# 85 unspecified descriptors, First 12 of them are reserved, the rest are avail\r
- .fill 85 * 16, 1, 0 # db (85 * 16) dup(0)\r
+ .fill 85 * 16, 1, 0 # db (85 * 16) dup(0)\r
\r
# IRQ 0 (System timer) - (INT 68h)\r
.equ IRQ0_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 1 (8042 Keyboard controller) - (INT 69h)\r
.equ IRQ1_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)\r
.equ IRQ2_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 3 (COM 2) - (INT 6bh)\r
.equ IRQ3_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 4 (COM 1) - (INT 6ch)\r
.equ IRQ4_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 5 (LPT 2) - (INT 6dh)\r
.equ IRQ5_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 6 (Floppy controller) - (INT 6eh)\r
.equ IRQ6_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 7 (LPT 1) - (INT 6fh)\r
.equ IRQ7_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 8 (RTC Alarm) - (INT 70h)\r
.equ IRQ8_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 9 - (INT 71h)\r
.equ IRQ9_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 10 - (INT 72h)\r
.equ IRQ10_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 11 - (INT 73h)\r
.equ IRQ11_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 12 (PS/2 mouse) - (INT 74h)\r
.equ IRQ12_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 13 (Floating point error) - (INT 75h)\r
.equ IRQ13_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 14 (Secondary IDE) - (INT 76h)\r
.equ IRQ14_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
# IRQ 15 (Primary IDE) - (INT 77h)\r
.equ IRQ15_SEL, .-IDT_BASE\r
- .word 0 # offset 15:0\r
+ .word 0 # offset 15:0\r
.long SYS_CODE64_SEL # selector 15:0\r
.byte 0 # 0 for interrupt gate\r
.byte 0x0e | 0x80 # type = 386 interrupt gate, present\r
- .word 0 # offset 31:16\r
- .long 0 # offset 63:32\r
- .long 0 # 0 for reserved\r
+ .word 0 # offset 31:16\r
+ .long 0 # offset 63:32\r
+ .long 0 # 0 for reserved\r
\r
IDT_END: \r
\r
- .align 0x2\r
+ .p2align 1\r
\r
MemoryMapSize: .long 0\r
MemoryMap: .long 0,0,0,0,0,0,0,0\r
.long 0,0,0,0,0,0,0,0\r
.long 0,0,0,0,0,0,0,0\r
\r
- .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\r
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\r
\r
- .org 0x0fe0\r
+ .org 0x0fe0\r
MyStack: \r
# below is the pieces of the IVT that is used to redirect INT 68h - 6fh\r
# back to INT 08h - 0fh when in real mode... It is 'org'ed to a\r
iret\r
\r
\r
- .org 0x0ffe\r
+ .org 0x0ffe\r
BlockSignature: \r
.word 0xaa55\r
\r