Fix Duet broken caused by LzmaUefiDecompress's interface is changed in IntelFramework...

[mirror_edk2.git] / DuetPkg / PciRootBridgeNoEnumerationDxe / PcatPciRootBridge.c

diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
index 3ebfc16de52a1d56cde0e9545861cd7a7cc4f954..059260c6003c2f18b7e814751fa8af0f9c57c14a 100644 (file)
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
@@ -1,6 +1,6 @@
 /*++\r
 \r
-Copyright (c) 2005 - 2008, Intel Corporation                                                         \r
+Copyright (c) 2005 - 2009, Intel Corporation                                                         \r
 All rights reserved. This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -21,7 +21,7 @@ Abstract:
 #include "PcatPciRootBridge.h"\r
 #include "DeviceIo.h"\r
 \r
-EFI_CPU_IO_PROTOCOL *gCpuIo;\r
+EFI_CPU_IO2_PROTOCOL *gCpuIo;\r
 \r
 EFI_STATUS\r
 EFIAPI\r
@@ -43,7 +43,7 @@ Returns:
 \r
 --*/\r
 {\r
-  EFI_STATUS                            Status;\r
+  EFI_STATUS                     Status;\r
   PCAT_PCI_ROOT_BRIDGE_INSTANCE  *PrivateData;\r
   UINTN                          PciSegmentIndex;\r
   UINTN                          PciRootBridgeIndex;\r
@@ -62,7 +62,7 @@ Returns:
   //\r
   // Initialize gCpuIo now since the chipset init code requires it.\r
   //\r
-  Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **)&gCpuIo);\r
+  Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **)&gCpuIo);\r
   ASSERT_EFI_ERROR (Status);\r
 \r
   //\r
@@ -93,7 +93,7 @@ Returns:
     PrivateData->Signature  = PCAT_PCI_ROOT_BRIDGE_SIGNATURE;\r
     PrivateData->Handle     = NULL;\r
     PrivateData->DevicePath = NULL;\r
-         InitializeListHead (&PrivateData->MapInfo);\r
+    InitializeListHead (&PrivateData->MapInfo);\r
 \r
     //\r
     // Initialize the PCI root bridge number and the bus range for that root bridge\r
@@ -183,7 +183,7 @@ Returns:
                                        &PrivateData->Io, \r
                                        EfiPciWidthUint16, \r
                                        Address, \r
-                                       sizeof (VendorId), \r
+                                       sizeof (VendorId) / sizeof (UINT16), \r
                                        &VendorId\r
                                        );\r
         if ((EFI_ERROR (Status)) || ((VendorId == 0xffff) && (Function == 0))) {\r
@@ -205,9 +205,9 @@ Returns:
         //\r
         Status = PrivateData->Io.Pci.Read (\r
                                        &PrivateData->Io, \r
-                                       EfiPciWidthUint32, \r
+                                       EfiPciWidthUint16, \r
                                        Address, \r
-                                       sizeof (PciConfigurationHeader) / sizeof (UINT32), \r
+                                       sizeof (PciConfigurationHeader) / sizeof (UINT16), \r
                                        &PciConfigurationHeader\r
                                        );\r
         if (EFI_ERROR (Status)) {\r