DynamicTablesPkg: Add SSDT CMN-600 Table generator

[mirror_edk2.git] / DynamicTablesPkg / Include / ArmNameSpaceObjects.h

diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index b2534a6505d6fb695f0751bbb09d365bd93d092e..f0654866444e5497a010f7e7177199604f5d32b6 100644 (file)
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -57,6 +57,7 @@ typedef enum ArmObjectID {
   EArmObjDeviceHandlePci,              ///< 33 - Device Handle Pci\r
   EArmObjGenericInitiatorAffinityInfo, ///< 34 - Generic Initiator Affinity\r
   EArmObjSerialPortInfo,               ///< 35 - Generic Serial Port Info\r
+  EArmObjCmn600Info,                   ///< 36 - CMN-600 Info\r
   EArmObjMax\r
 } EARM_OBJECT_ID;\r
 \r
@@ -653,18 +654,37 @@ typedef struct CmArmIdMapping {
   UINT32    Flags;\r
 } CM_ARM_ID_MAPPING;\r
 \r
-/** A structure that describes the\r
-    SMMU interrupts for the Platform.\r
-\r
-    ID: EArmObjSmmuInterruptArray\r
+/** A structure that describes the Arm\r
+    Generic Interrupts.\r
 */\r
-typedef struct CmArmSmmuInterrupt {\r
+typedef struct CmArmGenericInterrupt {\r
   /// Interrupt number\r
   UINT32    Interrupt;\r
 \r
   /// Flags\r
   UINT32    Flags;\r
-} CM_ARM_SMMU_INTERRUPT;\r
+} CM_ARM_GENERIC_INTERRUPT;\r
+\r
+/** A structure that describes the SMMU interrupts for the Platform.\r
+\r
+    Interrupt   Interrupt number.\r
+    Flags       Interrupt flags as defined for SMMU node.\r
+\r
+    ID: EArmObjSmmuInterruptArray\r
+*/\r
+typedef CM_ARM_GENERIC_INTERRUPT CM_ARM_SMMU_INTERRUPT;\r
+\r
+/** A structure that describes the AML Extended Interrupts.\r
+\r
+    Interrupt   Interrupt number.\r
+    Flags       Interrupt flags as defined by the Interrupt\r
+                Vector Flags (Byte 3) of the Extended Interrupt\r
+                resource descriptor.\r
+                See EFI_ACPI_EXTENDED_INTERRUPT_FLAG_xxx in Acpi10.h\r
+\r
+    ID: EArmObjExtendedInterruptInfo\r
+*/\r
+typedef CM_ARM_GENERIC_INTERRUPT CM_ARM_EXTENDED_INTERRUPT;\r
 \r
 /** A structure that describes the Processor Hierarchy Node (Type 0) in PPTT\r
 \r
@@ -825,6 +845,38 @@ typedef struct CmArmGenericInitiatorAffinityInfo {
   CM_OBJECT_TOKEN   DeviceHandleToken;\r
 } CM_ARM_GENERIC_INITIATOR_AFFINITY_INFO;\r
 \r
+/** A structure that describes the CMN-600 hardware.\r
+\r
+    ID: EArmObjCmn600Info\r
+*/\r
+typedef struct CmArmCmn600Info {\r
+  /// The PERIPHBASE address.\r
+  /// Corresponds to the Configuration Node Region (CFGR) base address.\r
+  UINT64                     PeriphBaseAddress;\r
+\r
+  /// The PERIPHBASE address length.\r
+  /// Corresponds to the CFGR base address length.\r
+  UINT64                     PeriphBaseAddressLength;\r
+\r
+  /// The ROOTNODEBASE address.\r
+  /// Corresponds to the Root node (ROOT) base address.\r
+  UINT64                     RootNodeBaseAddress;\r
+\r
+  /// The Debug and Trace Logic Controller (DTC) count.\r
+  /// CMN-600 can have maximum 4 DTCs.\r
+  UINT8                      DtcCount;\r
+\r
+  /// DTC Interrupt list.\r
+  /// The first interrupt resource descriptor pertains to\r
+  /// DTC[0], the second to DTC[1] and so on.\r
+  /// DtcCount determines the number of DTC Interrupts that\r
+  /// are populated. If DTC count is 2 then DtcInterrupt[2]\r
+  /// and DtcInterrupt[3] are ignored.\r
+  /// Note: The size of CM_ARM_CMN_600_INFO structure remains\r
+  /// constant and does not vary with the DTC count.\r
+  CM_ARM_EXTENDED_INTERRUPT  DtcInterrupt[4];\r
+} CM_ARM_CMN_600_INFO;\r
+\r
 #pragma pack()\r
 \r
 #endif // ARM_NAMESPACE_OBJECTS_H_\r