Correct FeatureFlagExpress PCD format based on INF spec.

[mirror_edk2.git] / EdkCompatibilityPkg / Compatibility / DeviceIoToPciRootBridgeIoThunk / DeviceIoToPciRootBridgeIoThunk.c

diff --git a/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c b/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c
index 3c8c2a58f6f122777c21eb05dbec4be372187eaf..a0ed14af48749031bba6231ff4d0e67aedb29ba3 100644 (file)
--- a/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c
+++ b/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c
@@ -61,8 +61,7 @@ DeviceIoMemRead (
   IN     UINT64                   Address,\r
   IN     UINTN                    Count,\r
   IN OUT VOID                     *Buffer\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -89,8 +88,7 @@ DeviceIoMemWrite (
   IN     UINT64                    Address,\r
   IN     UINTN                     Count,\r
   IN OUT VOID                      *Buffer\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Perform reading I/O space of device.\r
@@ -116,8 +114,7 @@ DeviceIoIoRead (
   IN     UINT64                   Address,\r
   IN     UINTN                    Count,\r
   IN OUT VOID                     *Buffer\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Perform writing I/O space of device.\r
@@ -143,8 +140,7 @@ DeviceIoIoWrite (
   IN     UINT64                    Address,\r
   IN     UINTN                     Count,\r
   IN OUT VOID                      *Buffer\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Perform reading PCI configuration space of device\r
@@ -170,8 +166,7 @@ DeviceIoPciRead (
   IN     UINT64                   Address,\r
   IN     UINTN                    Count,\r
   IN OUT VOID                     *Buffer\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Perform writing PCI configuration space of device.\r
@@ -197,8 +192,7 @@ DeviceIoPciWrite (
   IN     UINT64                    Address,\r
   IN     UINTN                     Count,\r
   IN OUT VOID                      *Buffer\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Provides an EFI Device Path for a PCI device with the given PCI configuration space address.\r
@@ -224,8 +218,7 @@ DeviceIoPciDevicePath (
   IN     EFI_DEVICE_IO_PROTOCOL        *This,\r
   IN     UINT64                        Address,\r
   IN OUT EFI_DEVICE_PATH_PROTOCOL      **PciDevicePath\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Provides the device-specific addresses needed to access system memory.\r
@@ -260,8 +253,7 @@ DeviceIoMap (
   IN OUT UINTN                    *NumberOfBytes,\r
   OUT    EFI_PHYSICAL_ADDRESS     *DeviceAddress,\r
   OUT    VOID                     **Mapping\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Completes the Map() operation and releases any corresponding resources.\r
@@ -279,8 +271,7 @@ EFIAPI
 DeviceIoUnmap (\r
   IN EFI_DEVICE_IO_PROTOCOL   *This,\r
   IN VOID                     *Mapping\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Allocates pages that are suitable for an EFIBusMasterCommonBuffer mapping.\r
@@ -308,8 +299,7 @@ DeviceIoAllocateBuffer (
   IN     EFI_MEMORY_TYPE           MemoryType,\r
   IN     UINTN                     Pages,\r
   IN OUT EFI_PHYSICAL_ADDRESS      *PhysicalAddress\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Flushes any posted write data to the device.\r
@@ -325,8 +315,7 @@ EFI_STATUS
 EFIAPI\r
 DeviceIoFlush (\r
   IN EFI_DEVICE_IO_PROTOCOL  *This\r
-  )\r
-;\r
+  );\r
 \r
 /**\r
   Frees pages that were allocated with AllocateBuffer().\r
@@ -348,11 +337,10 @@ DeviceIoFreeBuffer (
   IN EFI_DEVICE_IO_PROTOCOL   *This,\r
   IN UINTN                    Pages,\r
   IN EFI_PHYSICAL_ADDRESS     HostAddress\r
-  )\r
-;\r
+  );\r
 \r
 \r
-#define DEVICE_IO_PRIVATE_DATA_SIGNATURE  EFI_SIGNATURE_32 ('D', 'e', 'I', 'O')\r
+#define DEVICE_IO_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('D', 'e', 'I', 'O')\r
 \r
 typedef struct {\r
   UINTN                           Signature;\r
@@ -469,6 +457,8 @@ PciRootBridgeIoNotificationEvent (
       continue;\r
     }\r
 \r
+    Private->PciRootBridgeIo = PciRootBridgeIo;\r
+\r
     Status = gBS->HandleProtocol (\r
                     Handle,\r
                     &gEfiDevicePathProtocolGuid,\r
@@ -553,7 +543,7 @@ DeviceIoMemRead (
     return EFI_INVALID_PARAMETER;\r
   }\r
   if (Width >= MMIO_COPY_UINT8) {\r
-    Width = Width - MMIO_COPY_UINT8;\r
+    Width = (EFI_IO_WIDTH) (Width - MMIO_COPY_UINT8);\r
     Status = Private->PciRootBridgeIo->CopyMem (\r
                                          Private->PciRootBridgeIo,\r
                                          (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r
@@ -612,7 +602,7 @@ DeviceIoMemWrite (
     return EFI_INVALID_PARAMETER;\r
   }\r
   if (Width >= MMIO_COPY_UINT8) {\r
-    Width = Width - MMIO_COPY_UINT8;\r
+    Width = (EFI_IO_WIDTH) (Width - MMIO_COPY_UINT8);\r
     Status = Private->PciRootBridgeIo->CopyMem (\r
                                          Private->PciRootBridgeIo,\r
                                          (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r