--- /dev/null
+/// @file\r
+/// Contains an implementation of EcpEfiBreakPoint and EcpMemoryFence on Itanium-based\r
+/// architecture.\r
+///\r
+/// Copyright (c) 2008, Intel Corporation\r
+/// All rights reserved. This program and the accompanying materials\r
+/// are licensed and made available under the terms and conditions of the BSD License\r
+/// which accompanies this distribution. The full text of the license may be found at\r
+/// http://opensource.org/licenses/bsd-license.php\r
+///\r
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+///\r
+/// Module Name: AsmCpuMisc.s\r
+///\r
+///\r
+\r
+\r
+.text\r
+.proc EcpEfiBreakPoint\r
+.type EcpEfiBreakPoint, @function\r
+\r
+EcpEfiBreakPoint::\r
+ break.i 0;;\r
+ br.ret.dpnt b0;;\r
+\r
+.endp EcpEfiBreakPoint\r
+\r
+.proc EcpMemoryFence\r
+.type EcpMemoryFence, @function\r
+\r
+EcpMemoryFence::\r
+ mf;; // memory access ordering\r
+\r
+ // do we need the mf.a also here?\r
+ mf.a // wait for any IO to complete?\r
+ \r
+ // not sure if we need serialization here, just put it, in case...\r
+ \r
+ srlz.d;;\r
+ srlz.i;;\r
+ \r
+ br.ret.dpnt b0;;\r
+.endp EcpMemoryFence
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