.globl ASM_PFX(InternalAsmThunk16)\r
\r
# define the structure of IA32_REGS\r
-.equ _EDI, 0 #size 4\r
-.equ _ESI, 4 #size 4\r
-.equ _EBP, 8 #size 4\r
-.equ _ESP, 12 #size 4\r
-.equ _EBX, 16 #size 4\r
-.equ _EDX, 20 #size 4\r
-.equ _ECX, 24 #size 4\r
-.equ _EAX, 28 #size 4\r
-.equ _DS, 32 #size 2\r
-.equ _ES, 34 #size 2\r
-.equ _FS, 36 #size 2\r
-.equ _GS, 38 #size 2\r
-.equ _EFLAGS, 40 #size 8\r
-.equ _EIP, 48 #size 4\r
-.equ _CS, 52 #size 2\r
-.equ _SS, 54 #size 2\r
-.equ IA32_REGS_SIZE, 56\r
+.set _EDI, 0 #size 4\r
+.set _ESI, 4 #size 4\r
+.set _EBP, 8 #size 4\r
+.set _ESP, 12 #size 4\r
+.set _EBX, 16 #size 4\r
+.set _EDX, 20 #size 4\r
+.set _ECX, 24 #size 4\r
+.set _EAX, 28 #size 4\r
+.set _DS, 32 #size 2\r
+.set _ES, 34 #size 2\r
+.set _FS, 36 #size 2\r
+.set _GS, 38 #size 2\r
+.set _EFLAGS, 40 #size 8\r
+.set _EIP, 48 #size 4\r
+.set _CS, 52 #size 2\r
+.set _SS, 54 #size 2\r
+.set IA32_REGS_SIZE, 56\r
\r
.data\r
-\r
+ \r
+#ifndef __APPLE__\r
ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)\r
ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)\r
ASM_PFX(m16Gdt): .word ASM_PFX(NullSeg) - ASM_PFX(m16Start)\r
ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)\r
ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)\r
+#endif\r
\r
.text\r
\r
#------------------------------------------------------------------------------\r
.globl ASM_PFX(BackFromUserCode)\r
ASM_PFX(BackFromUserCode):\r
+#ifdef __APPLE__\r
+ int $3\r
+#else\r
#\r
# The order of saved registers on the stack matches the order they appears\r
# in IA32_REGS structure. This facilitates wrapper function to extract them\r
.byte 0x67,0xbc # mov esp, imm32\r
SavedSp: .space 4 # restore stack\r
nop\r
+#endif\r
ret\r
\r
+#ifndef __APPLE__\r
_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)\r
.word CODE16\r
_16Gdtr: .word GDT_SIZE - 1\r
_16GdtrBase: .quad ASM_PFX(NullSeg)\r
_16Idtr: .word 0x3ff\r
.long 0\r
+#endif\r
\r
#------------------------------------------------------------------------------\r
# _ToUserCode() takes control in real mode before passing control to user code.\r
#------------------------------------------------------------------------------\r
.globl ASM_PFX(ToUserCode)\r
ASM_PFX(ToUserCode):\r
+#ifdef __APPLE__\r
+ int $3\r
+#else\r
movl %edx,%ss # set new segment selectors\r
movl %edx,%ds\r
movl %edx,%es\r
.byte 0x66, 0x9d # popfd\r
leaw 4(%esp),%sp # skip high order 32 bits of EFlags\r
.byte 0x66 # make the following retf 32-bit\r
- lret # transfer control to user code\r
+#endif\r
+ lret # transfer control to user code\r
\r
-.equ CODE16, ASM_PFX(_16Code) - .\r
-.equ DATA16, ASM_PFX(_16Data) - .\r
-.equ DATA32, ASM_PFX(_32Data) - .\r
+.set CODE16, ASM_PFX(_16Code) - .\r
+.set DATA16, ASM_PFX(_16Data) - .\r
+.set DATA32, ASM_PFX(_32Data) - .\r
\r
ASM_PFX(NullSeg): .quad 0\r
ASM_PFX(_16Code):\r
.byte 0xcf # 16-bit segment, 4GB limit\r
.byte 0\r
\r
-.equ GDT_SIZE, . - ASM_PFX(NullSeg)\r
+.set GDT_SIZE, . - ASM_PFX(NullSeg)\r
\r
#------------------------------------------------------------------------------\r
# IA32_REGISTER_SET *\r
\r
.globl ASM_PFX(InternalAsmThunk16)\r
ASM_PFX(InternalAsmThunk16):\r
+#ifdef __APPLE__\r
+ int $3\r
+#else\r
pushq %rbp\r
pushq %rbx\r
pushq %rsi\r
popq %rsi\r
popq %rbx\r
popq %rbp\r
-\r
+#endif\r
ret\r