+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2006 - 2007, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-Module Name:\r
-\r
- Ehci.h\r
-\r
-Abstract:\r
-\r
-\r
-Revision History\r
---*/\r
-\r
-#ifndef _EHCI_H\r
-#define _EHCI_H\r
-\r
-//\r
-// Universal Host Controller Interface data structures and defines\r
-//\r
-#include <IndustryStandard/pci22.h>\r
-\r
-\r
-extern UINTN gEHCDebugLevel;\r
-extern UINTN gEHCErrorLevel;\r
-\r
-\r
-#define STALL_1_MACRO_SECOND 1\r
-#define STALL_1_MILLI_SECOND 1000 * STALL_1_MACRO_SECOND\r
-#define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND\r
-\r
-#define MEM_UNIT_SIZE 128\r
-\r
-\r
-#define SETUP_PACKET_PID_CODE 0x02\r
-#define INPUT_PACKET_PID_CODE 0x01\r
-#define OUTPUT_PACKET_PID_CODE 0x0\r
-\r
-#define ITD_SELECT_TYPE 0x0\r
-#define QH_SELECT_TYPE 0x01\r
-#define SITD_SELECT_TYPE 0x02\r
-#define FSTN_SELECT_TYPE 0x03\r
-\r
-#define EHCI_SET_PORT_RESET_RECOVERY_TIME 50 * STALL_1_MILLI_SECOND\r
-#define EHCI_CLEAR_PORT_RESET_RECOVERY_TIME STALL_1_MILLI_SECOND\r
-#define EHCI_GENERIC_TIMEOUT 50 * STALL_1_MILLI_SECOND\r
-#define EHCI_GENERIC_RECOVERY_TIME 50 * STALL_1_MACRO_SECOND\r
-#define EHCI_SYNC_REQUEST_POLLING_TIME 50 * STALL_1_MACRO_SECOND\r
-#define EHCI_ASYNC_REQUEST_POLLING_TIME 50 * STALL_1_MILLI_SECOND\r
-\r
-#define USB_BAR_INDEX 0 /* how many bytes away from USB_BASE to 0x10 */\r
-\r
-#define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16\r
-\r
-#define EHCI_MIN_PACKET_SIZE 8\r
-#define EHCI_MAX_PACKET_SIZE 1024\r
-#define EHCI_MAX_FRAME_LIST_LENGTH 1024\r
-#define EHCI_BLOCK_SIZE_WITH_TT 64\r
-#define EHCI_BLOCK_SIZE 512\r
-#define EHCI_MAX_QTD_CAPACITY (EFI_PAGE_SIZE * 5)\r
-\r
-#define NAK_COUNT_RELOAD 3\r
-#define QTD_ERROR_COUNTER 3\r
-#define HIGH_BANDWIDTH_PIPE_MULTIPLIER 1\r
-\r
-#define QTD_STATUS_ACTIVE 0x80\r
-#define QTD_STATUS_HALTED 0x40\r
-#define QTD_STATUS_BUFFER_ERR 0x20\r
-#define QTD_STATUS_BABBLE_ERR 0x10\r
-#define QTD_STATUS_TRANSACTION_ERR 0x08\r
-#define QTD_STATUS_DO_STOP_SPLIT 0x02\r
-#define QTD_STATUS_DO_START_SPLIT 0\r
-#define QTD_STATUS_DO_PING 0x01\r
-#define QTD_STATUS_DO_OUT 0\r
-\r
-#define DATA0 0\r
-#define DATA1 1\r
-\r
-#define MICRO_FRAME_0_CHANNEL 0x01\r
-#define MICRO_FRAME_1_CHANNEL 0x02\r
-#define MICRO_FRAME_2_CHANNEL 0x04\r
-#define MICRO_FRAME_3_CHANNEL 0x08\r
-#define MICRO_FRAME_4_CHANNEL 0x10\r
-#define MICRO_FRAME_5_CHANNEL 0x20\r
-#define MICRO_FRAME_6_CHANNEL 0x40\r
-#define MICRO_FRAME_7_CHANNEL 0x80\r
-\r
-#define CONTROL_TRANSFER 0x01\r
-#define BULK_TRANSFER 0x02\r
-#define SYNC_INTERRUPT_TRANSFER 0x04\r
-#define ASYNC_INTERRUPT_TRANSFER 0x08\r
-#define SYNC_ISOCHRONOUS_TRANSFER 0x10\r
-#define ASYNC_ISOCHRONOUS_TRANSFER 0x20\r
-\r
-\r
-//\r
-// Enhanced Host Controller Registers definitions\r
-//\r
-extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;\r
-extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;\r
-\r
-#define USBCMD 0x0 /* Command Register Offset 00-03h */\r
-#define USBCMD_RS 0x01 /* Run / Stop */\r
-#define USBCMD_HCRESET 0x02 /* Host controller reset */\r
-#define USBCMD_FLS_512 0x04 /* 512 elements (2048bytes) in Frame List */\r
-#define USBCMD_FLS_256 0x08 /* 256 elements (1024bytes) in Frame List */\r
-#define USBCMD_PSE 0x10 /* Periodic schedule enable */\r
-#define USBCMD_ASE 0x20 /* Asynchronous schedule enable */\r
-#define USBCMD_IAAD 0x40 /* Interrupt on async advance doorbell */\r
-\r
-#define USBSTS 0x04 /* Statue Register Offset 04-07h */\r
-#define USBSTS_HSE 0x10 /* Host system error */\r
-#define USBSTS_IAA 0x20 /* Interrupt on async advance */\r
-#define USBSTS_HCH 0x1000 /* Host controller halted */\r
-#define USBSTS_PSS 0x4000 /* Periodic schedule status */\r
-#define USBSTS_ASS 0x8000 /* Asynchronous schedule status */\r
-\r
-#define USBINTR 0x08 /* Command Register Offset 08-0bh */\r
-\r
-#define FRINDEX 0x0c /* Frame Index Offset 0c-0fh */\r
-\r
-#define CTRLDSSGMENT 0x10 /* 4G Segment Selector Offset 10-13h */\r
-\r
-#define PERIODICLISTBASE 0x14 /* Frame List Base Address Offset 14-17h */\r
-\r
-#define ASYNCLISTADDR 0x18 /* Next Asynchronous List Address Offset 18-1bh */\r
-\r
-#define CONFIGFLAG 0x40 /* Configured Flag Register Offset 40-43h */\r
-#define CONFIGFLAG_CF 0x01 /* Configure Flag */\r
-\r
-#define PORTSC 0x44 /* Port Status/Control Offset 44-47h */\r
-#define PORTSC_CCS 0x01 /* Current Connect Status*/\r
-#define PORTSC_CSC 0x02 /* Connect Status Change */\r
-#define PORTSC_PED 0x04 /* Port Enable / Disable */\r
-#define PORTSC_PEDC 0x08 /* Port Enable / Disable Change */\r
-#define PORTSC_OCA 0x10 /* Over current Active */\r
-#define PORTSC_OCC 0x20 /* Over current Change */\r
-#define PORTSC_FPR 0x40 /* Force Port Resume */\r
-#define PORTSC_SUSP 0x80 /* Port Suspend State */\r
-#define PORTSC_PR 0x100 /* Port Reset */\r
-#define PORTSC_LS_KSTATE 0x400 /* Line Status K-state */\r
-#define PORTSC_LS_JSTATE 0x800 /* Line Status J-state */\r
-#define PORTSC_PP 0x1000 /* Port Power */\r
-#define PORTSC_PO 0x2000 /* Port Owner */\r
-\r
-#define CAPLENGTH 0 /* Capability Register Length 00h */\r
-\r
-#define HCIVERSION 0x02 /* Interface Version Number 02-03h */\r
-\r
-#define HCSPARAMS 0x04 /* Structural Parameters 04-07h */\r
-#define HCSP_NPORTS 0x0f /* Number of physical downstream ports on host controller */\r
-\r
-#define HCCPARAMS 0x08 /* Capability Parameters 08-0bh */\r
-#define HCCP_64BIT 0x01 /* 64-bit Addressing Capability */\r
-#define HCCP_PFLF 0x02 /* Programmable Frame List Flag */\r
-#define HCCP_EECP 0xff00 /* EHCI Extemded Capabilities Pointer */\r
-\r
-#define HCSPPORTROUTE 0x0c /* Companion Port Route Description 60b */\r
-\r
-#define CLASSC 0x09 /* Class Code 09-0bh */\r
-\r
-#define USBBASE 0x10 /* Base Address to Memory-mapped Host Controller Register Space 10-13h */\r
-\r
-#define SBRN 0x60 /* Serial Bus Release Number 60h */\r
-\r
-#define FLADJ 0x61 /* Frame Length Adjustment Register 61h */\r
-\r
-#define PORTWAKECAP 0x62 /* Port wake capablilities register(OPIONAL) 61-62h */\r
-\r
-//\r
-// PCI Configuration Registers\r
-//\r
-#define EHCI_PCI_CLASSC 0x09\r
-#define EHCI_PCI_MEMORY_BASE 0x10\r
-\r
-//\r
-// Memory Offset Registers\r
-//\r
-#define EHCI_MEMORY_CAPLENGTH 0x0\r
-#define EHCI_MEMORY_CONFIGFLAG 0x40\r
-\r
-//\r
-// USB Base Class Code,Sub-Class Code and Programming Interface\r
-//\r
-#define PCI_CLASSC_PI_EHCI PCI_IF_EHCI\r
-\r
-#define SETUP_PACKET_ID 0x2D\r
-#define INPUT_PACKET_ID 0x69\r
-#define OUTPUT_PACKET_ID 0xE1\r
-#define ERROR_PACKET_ID 0x55\r
-\r
-#define bit(a) (1 << (a))\r
-\r
-#define GET_0B_TO_31B(Addr) (((UINTN) Addr) & (0xffffffff))\r
-#define GET_32B_TO_63B(Addr) ((UINTN)RShiftU64((UINTN) Addr, 32) & (0xffffffff))\r
-\r
-\r
-//\r
-// Ehci Data and Ctrl Structures\r
-//\r
-#pragma pack(1)\r
-\r
-typedef struct {\r
- UINT8 PI;\r
- UINT8 SubClassCode;\r
- UINT8 BaseCode;\r
-} USB_CLASSC;\r
-\r
-//\r
-//32 Bytes Aligned\r
-//\r
-typedef struct {\r
- UINT32 NextQtdTerminate : 1;\r
- UINT32 Rsvd1 : 4;\r
- UINT32 NextQtdPointer : 27;\r
-\r
- UINT32 AltNextQtdTerminate : 1;\r
- UINT32 Rsvd2 : 4;\r
- UINT32 AltNextQtdPointer : 27;\r
-\r
- UINT32 Status : 8;\r
- UINT32 PidCode : 2;\r
- UINT32 ErrorCount : 2;\r
- UINT32 CurrentPage : 3;\r
- UINT32 InterruptOnComplete : 1;\r
- UINT32 TotalBytes : 15;\r
- UINT32 DataToggle : 1;\r
-\r
- UINT32 CurrentOffset : 12;\r
- UINT32 BufferPointer0 : 20;\r
-\r
- UINT32 Rsvd3 : 12;\r
- UINT32 BufferPointer1 : 20;\r
-\r
- UINT32 Rsvd4 : 12;\r
- UINT32 BufferPointer2 : 20;\r
-\r
- UINT32 Rsvd5 : 12;\r
- UINT32 BufferPointer3 : 20;\r
-\r
- UINT32 Rsvd6 : 12;\r
- UINT32 BufferPointer4 : 20;\r
-\r
- UINT32 PAD[5];\r
-} EHCI_QTD_HW;\r
-\r
-//\r
-//32 Bytes Aligned\r
-//\r
-typedef struct {\r
- UINT32 QhTerminate : 1;\r
- UINT32 SelectType : 2;\r
- UINT32 Rsvd1 : 2;\r
- UINT32 QhHorizontalPointer : 27;\r
-\r
- UINT32 DeviceAddr : 7;\r
- UINT32 Inactive : 1;\r
- UINT32 EndpointNum : 4;\r
- UINT32 EndpointSpeed : 2;\r
- UINT32 DataToggleControl : 1;\r
- UINT32 HeadReclamationFlag : 1;\r
- UINT32 MaxPacketLen : 11;\r
- UINT32 ControlEndpointFlag : 1;\r
- UINT32 NakCountReload : 4;\r
-\r
- UINT32 InerruptScheduleMask : 8;\r
- UINT32 SplitComletionMask : 8;\r
- UINT32 HubAddr : 7;\r
- UINT32 PortNum : 7;\r
- UINT32 Multiplier : 2;\r
-\r
- UINT32 Rsvd2 : 5;\r
- UINT32 CurrentQtdPointer : 27;\r
-\r
- UINT32 NextQtdTerminate : 1;\r
- UINT32 Rsvd3 : 4;\r
- UINT32 NextQtdPointer : 27;\r
-\r
- UINT32 AltNextQtdTerminate : 1;\r
- UINT32 NakCount : 4;\r
- UINT32 AltNextQtdPointer : 27;\r
-\r
- UINT32 Status : 8;\r
- UINT32 PidCode : 2;\r
- UINT32 ErrorCount : 2;\r
- UINT32 CurrentPage : 3;\r
- UINT32 InterruptOnComplete : 1;\r
- UINT32 TotalBytes : 15;\r
- UINT32 DataToggle : 1;\r
-\r
- UINT32 CurrentOffset : 12;\r
- UINT32 BufferPointer0 : 20;\r
-\r
- UINT32 CompleteSplitMask : 8;\r
- UINT32 Rsvd4 : 4;\r
- UINT32 BufferPointer1 : 20;\r
-\r
- UINT32 FrameTag : 5;\r
- UINT32 SplitBytes : 7;\r
- UINT32 BufferPointer2 : 20;\r
-\r
- UINT32 Rsvd5 : 12;\r
- UINT32 BufferPointer3 : 20;\r
-\r
- UINT32 Rsvd6 : 12;\r
- UINT32 BufferPointer4 : 20;\r
-\r
- UINT32 Pad[5];\r
-} EHCI_QH_HW;\r
-\r
-typedef struct {\r
- UINT32 LinkTerminate : 1;\r
- UINT32 SelectType : 2;\r
- UINT32 Rsvd : 2;\r
- UINT32 LinkPointer : 27;\r
-} FRAME_LIST_ENTRY;\r
-\r
-#pragma pack()\r
-\r
-typedef struct _EHCI_QTD_ENTITY EHCI_QTD_ENTITY;\r
-typedef struct _EHCI_QH_ENTITY EHCI_QH_ENTITY;\r
-typedef struct _EHCI_ASYNC_REQUEST EHCI_ASYNC_REQUEST;\r
-//\r
-//Aligan On 32 Bytes\r
-//\r
-struct _EHCI_QTD_ENTITY {\r
- EHCI_QTD_HW Qtd;\r
- UINT32 TotalBytes;\r
- UINT32 StaticTotalBytes;\r
- UINT32 StaticCurrentOffset;\r
- EHCI_QTD_ENTITY *Prev;\r
- EHCI_QTD_ENTITY *Next;\r
- EHCI_QTD_ENTITY *AltNext;\r
- EHCI_QH_ENTITY *SelfQh;\r
-};\r
-//\r
-//Aligan On 32 Bytes\r
-//\r
-struct _EHCI_QH_ENTITY {\r
- EHCI_QH_HW Qh;\r
- EHCI_QH_ENTITY *Next;\r
- EHCI_QH_ENTITY *Prev;\r
- EHCI_QTD_ENTITY *FirstQtdPtr;\r
- EHCI_QTD_ENTITY *LastQtdPtr;\r
- EHCI_QTD_ENTITY *AltQtdPtr;\r
- UINTN Interval;\r
- UINT8 TransferType;\r
-};\r
-\r
-#define GET_QH_ENTITY_ADDR(a) ((EHCI_QH_ENTITY *) a)\r
-#define GET_QTD_ENTITY_ADDR(a) ((EHCI_QTD_ENTITY *) a)\r
-\r
-\r
-//\r
-// Ehci Managment Structures\r
-//\r
-#define USB2_HC_DEV_FROM_THIS(a) CR (a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r
-\r
-#define USB2_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')\r
-\r
-struct _EHCI_ASYNC_REQUEST {\r
- UINT8 TransferType;\r
- EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunc;\r
- VOID *Context;\r
- EHCI_ASYNC_REQUEST *Prev;\r
- EHCI_ASYNC_REQUEST *Next;\r
- EHCI_QH_ENTITY *QhPtr;\r
-};\r
-\r
-typedef struct _MEMORY_MANAGE_HEADER {\r
- UINT8 *BitArrayPtr;\r
- UINTN BitArraySizeInBytes;\r
- UINT8 *MemoryBlockPtr;\r
- UINTN MemoryBlockSizeInBytes;\r
- VOID *Mapping;\r
- struct _MEMORY_MANAGE_HEADER *Next;\r
-} MEMORY_MANAGE_HEADER;\r
-\r
-typedef struct _USB2_HC_DEV {\r
- UINTN Signature;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- EFI_USB2_HC_PROTOCOL Usb2Hc;\r
- UINTN PeriodicFrameListLength;\r
- VOID *PeriodicFrameListBuffer;\r
- VOID *PeriodicFrameListMap;\r
- VOID *AsyncList;\r
- EHCI_ASYNC_REQUEST *AsyncRequestList;\r
- EFI_EVENT AsyncRequestEvent;\r
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
- MEMORY_MANAGE_HEADER *MemoryHeader;\r
- UINT8 Is64BitCapable;\r
- UINT32 High32BitAddr;\r
- EHCI_QH_ENTITY *NULLQH;\r
- UINT32 UsbCapabilityLen;\r
- UINT16 DeviceSpeed[16];\r
-} USB2_HC_DEV;\r
-\r
-\r
-//\r
-// Prototypes\r
-// Driver model protocol interface\r
-//\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
- );\r
-\r
-//\r
-// Ehci protocol interface\r
-//\r
-EFI_STATUS\r
-EFIAPI\r
-EhciGetCapability (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- OUT UINT8 *MaxSpeed,\r
- OUT UINT8 *PortNumber,\r
- OUT UINT8 *Is64BitCapable\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciReset (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT16 Attributes\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciGetState (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- OUT EFI_USB_HC_STATE *State\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciSetState (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN EFI_USB_HC_STATE State\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciControlTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN EFI_USB_DEVICE_REQUEST *Request,\r
- IN EFI_USB_DATA_DIRECTION TransferDirection,\r
- IN OUT VOID *Data,\r
- IN OUT UINTN *DataLength,\r
- IN UINTN TimeOut,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciBulkTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN UINT8 DataBuffersNumber,\r
- IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],\r
- IN OUT UINTN *DataLength,\r
- IN OUT UINT8 *DataToggle,\r
- IN UINTN TimeOut,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciAsyncInterruptTransfer (\r
- IN EFI_USB2_HC_PROTOCOL * This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaxiumPacketLength,\r
- IN BOOLEAN IsNewTransfer,\r
- IN OUT UINT8 *DataToggle,\r
- IN UINTN PollingInterval,\r
- IN UINTN DataLength,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r
- IN VOID *Context OPTIONAL\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciSyncInterruptTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN OUT VOID *Data,\r
- IN OUT UINTN *DataLength,\r
- IN OUT UINT8 *DataToggle,\r
- IN UINTN TimeOut,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciIsochronousTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN UINT8 DataBuffersNumber,\r
- IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],\r
- IN UINTN DataLength,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciAsyncIsochronousTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN UINT8 DataBuffersNumber,\r
- IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],\r
- IN UINTN DataLength,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,\r
- IN VOID *Context\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciGetRootHubPortStatus (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 PortNumber,\r
- OUT EFI_USB_PORT_STATUS *PortStatus\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciSetRootHubPortFeature (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 PortNumber,\r
- IN EFI_USB_PORT_FEATURE PortFeature\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciClearRootHubPortFeature (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 PortNumber,\r
- IN EFI_USB_PORT_FEATURE PortFeature\r
- );\r
-\r
-//\r
-// EFI Component Name Functions\r
-//\r
-EFI_STATUS\r
-EFIAPI\r
-EhciComponentNameGetDriverName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **DriverName\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-EhciComponentNameGetControllerName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN EFI_HANDLE ControllerHandle,\r
- IN EFI_HANDLE ChildHandle, OPTIONAL\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **ControllerName\r
- );\r
-\r
-//\r
-// Internal Functions Declaration\r
-//\r
-\r
-//\r
-// EhciMem Functions\r
-//\r
-EFI_STATUS\r
-CreateMemoryBlock (\r
- IN USB2_HC_DEV *HcDev,\r
- OUT MEMORY_MANAGE_HEADER **MemoryHeader,\r
- IN UINTN MemoryBlockSizeInPages\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Use PciIo->AllocateBuffer to allocate common buffer for the memory block,\r
- and use PciIo->Map to map the common buffer for Bus Master Read/Write.\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- MemoryHeader - MEMORY_MANAGE_HEADER to output\r
- MemoryBlockSizeInPages - MemoryBlockSizeInPages\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_OUT_OF_RESOURCES Fail for no resources\r
- EFI_UNSUPPORTED Unsupported currently\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-FreeMemoryHeader (\r
- IN USB2_HC_DEV *HcDev,\r
- IN MEMORY_MANAGE_HEADER *MemoryHeader\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Free Memory Header\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- MemoryHeader - MemoryHeader to be freed\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_INVALID_PARAMETER Parameter is error\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-InsertMemoryHeaderToList (\r
- IN MEMORY_MANAGE_HEADER *MemoryHeader,\r
- IN MEMORY_MANAGE_HEADER *NewMemoryHeader\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Insert Memory Header To List\r
-\r
-Arguments:\r
-\r
- MemoryHeader - MEMORY_MANAGE_HEADER\r
- NewMemoryHeader - MEMORY_MANAGE_HEADER\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-AllocMemInMemoryBlock (\r
- IN MEMORY_MANAGE_HEADER *MemoryHeader,\r
- OUT VOID **Pool,\r
- IN UINTN NumberOfMemoryUnit\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Alloc Memory In MemoryBlock\r
-\r
-Arguments:\r
-\r
- MemoryHeader - MEMORY_MANAGE_HEADER\r
- Pool - Place to store pointer to memory\r
- NumberOfMemoryUnit - Number Of Memory Unit\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_NOT_FOUND Can't find the free memory\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsMemoryBlockEmptied (\r
- IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Is Memory Block Emptied\r
-\r
-Arguments:\r
-\r
- MemoryHeaderPtr - MEMORY_MANAGE_HEADER\r
-\r
-Returns:\r
-\r
- TRUE Empty\r
- FALSE Not Empty\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-DelinkMemoryBlock (\r
- IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,\r
- IN MEMORY_MANAGE_HEADER *NeedFreeMemoryHeader\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Delink Memory Block\r
-\r
-Arguments:\r
-\r
- FirstMemoryHeader - MEMORY_MANAGE_HEADER\r
- NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-InitialMemoryManagement (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Initialize Memory Management\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-DeinitialMemoryManagement (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Deinitialize Memory Management\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-EhciAllocatePool (\r
- IN USB2_HC_DEV *HcDev,\r
- OUT UINT8 **Pool,\r
- IN UINTN AllocSize\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Ehci Allocate Pool\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Pool - Place to store pointer to the memory buffer\r
- AllocSize - Alloc Size\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-EhciFreePool (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 *Pool,\r
- IN UINTN AllocSize\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Uhci Free Pool\r
-\r
-Arguments:\r
-\r
- HcDev - USB_HC_DEV\r
- Pool - Pool to free\r
- AllocSize - Pool size\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-//\r
-// EhciReg Functions\r
-//\r
-EFI_STATUS\r
-ReadEhcCapabiltiyReg (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT32 CapabiltiyRegAddr,\r
- IN OUT UINT32 *Data\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Read Ehc Capabitlity register\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- CapabiltiyRegAddr - Ehc Capability register address\r
- Data - A pointer to data read from register\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-ReadEhcOperationalReg (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT32 OperationalRegAddr,\r
- IN OUT UINT32 *Data\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Read Ehc Operation register\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- OperationalRegAddr - Ehc Operation register address\r
- Data - A pointer to data read from register\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WriteEhcOperationalReg (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT32 OperationalRegAddr,\r
- IN UINT32 Data\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Write Ehc Operation register\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- OperationalRegAddr - Ehc Operation register address\r
- Data - 32bit write to register\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-SetEhcDoorbell (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Set Ehc door bell bit\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-SetFrameListLen (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Length\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Set the length of Frame List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Length - the required length of frame list\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_INVALID_PARAMETER Invalid parameter\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsFrameListProgrammable (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether frame list is programmable\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE Programmable\r
- FALSE Unprogrammable\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsPeriodicScheduleEnabled (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether periodic schedule is enabled\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE Enabled\r
- FALSE Disabled\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsAsyncScheduleEnabled (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether asynchronous schedule is enabled\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE Enabled\r
- FALSE Disabled\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsEhcPortEnabled (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 PortNum\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether port is enabled\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE Enabled\r
- FALSE Disabled\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsEhcReseted (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Ehc is halted\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE Reseted\r
- FALSE Unreseted\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsEhcHalted (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Ehc is halted\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE Halted\r
- FALSE Not halted\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsEhcSysError (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Ehc is system error\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE System error\r
- FALSE No system error\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsHighSpeedDevice (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 PortNum\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether high speed device attached\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- TRUE High speed\r
- FALSE Full speed\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForEhcReset (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- wait for Ehc reset or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForEhcHalt (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- wait for Ehc halt or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForEhcNotHalt (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- wait for Ehc not halt or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForEhcDoorbell (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Wait for periodic schedule disable or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForAsyncScheduleEnable (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Wait for Ehc asynchronous schedule enable or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForAsyncScheduleDisable (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Wait for Ehc asynchronous schedule disable or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForPeriodicScheduleEnable (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Wait for Ehc periodic schedule enable or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-WaitForPeriodicScheduleDisable (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Timeout\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Wait for periodic schedule disable or timeout\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Timeout - timeout threshold\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_TIMEOUT Timeout\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-GetCapabilityLen (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Get the length of capability register\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-SetFrameListBaseAddr (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT32 FrameBuffer\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Set base address of frame list first entry\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- FrameBuffer - base address of first entry of frame list\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-SetAsyncListAddr (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_QH_ENTITY *QhPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Set address of first Async schedule Qh\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- QhPtr - A pointer to first Qh in the Async schedule\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-SetCtrlDataStructSeg (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Set address of first Async schedule Qh\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- QhPtr - A pointer to first Qh in the Async schedule\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-SetPortRoutingEhc (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Set Ehc port routing bit\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-EnablePeriodicSchedule (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Enable periodic schedule\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-DisablePeriodicSchedule (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Disable periodic schedule\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-EnableAsynchronousSchedule (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Enable asynchrounous schedule\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-DisableAsynchronousSchedule (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Disable asynchrounous schedule\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-StartScheduleExecution (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Start Ehc schedule execution\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-ResetEhc (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Reset Ehc\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-ClearEhcAllStatus (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Clear Ehc all status bits\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-//\r
-// EhciSched Functions\r
-//\r
-EFI_STATUS\r
-InitialPeriodicFrameList (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINTN Length\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Initialize Periodic Schedule Frame List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Length - Frame List Length\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-DeinitialPeriodicFrameList (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Deinitialize Periodic Schedule Frame List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreatePollingTimer (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EFI_EVENT_NOTIFY NotifyFunction\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Async Request Polling Timer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- NotifyFunction - Timer Notify Function\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-DestoryPollingTimer (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Destory Async Request Polling Timer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-StartPollingTimer (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Start Async Request Polling Timer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-StopPollingTimer (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Stop Async Request Polling Timer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateQh (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 DeviceAddr,\r
- IN UINT8 Endpoint,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaxPacketLen,\r
- OUT EHCI_QH_ENTITY **QhPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qh Structure and Pre-Initialize\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DeviceAddr - Address of Device\r
- Endpoint - Endpoint Number\r
- DeviceSpeed - Device Speed\r
- MaxPacketLen - Max Length of one Packet\r
- QhPtrPtr - A pointer of pointer to Qh for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateControlQh (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 DeviceAddr,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaxPacketLen,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT EHCI_QH_ENTITY **QhPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qh for Control Transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DeviceAddr - Address of Device\r
- DeviceSpeed - Device Speed\r
- MaxPacketLen - Max Length of one Packet\r
- Translator - Translator Transaction for SplitX\r
- QhPtrPtr - A pointer of pointer to Qh for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateBulkQh (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 DeviceAddr,\r
- IN UINT8 EndPointAddr,\r
- IN UINT8 DeviceSpeed,\r
- IN UINT8 DataToggle,\r
- IN UINTN MaxPacketLen,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT EHCI_QH_ENTITY **QhPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qh for Bulk Transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DeviceAddr - Address of Device\r
- EndPointAddr - Address of Endpoint\r
- DeviceSpeed - Device Speed\r
- MaxPacketLen - Max Length of one Packet\r
- Translator - Translator Transaction for SplitX\r
- QhPtrPtr - A pointer of pointer to Qh for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateInterruptQh (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 DeviceAddr,\r
- IN UINT8 EndPointAddr,\r
- IN UINT8 DeviceSpeed,\r
- IN UINT8 DataToggle,\r
- IN UINTN MaxPacketLen,\r
- IN UINTN Interval,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT EHCI_QH_ENTITY **QhPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qh for Control Transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DeviceAddr - Address of Device\r
- EndPointAddr - Address of Endpoint\r
- DeviceSpeed - Device Speed\r
- MaxPacketLen - Max Length of one Packet\r
- Interval - value of interval\r
- Translator - Translator Transaction for SplitX\r
- QhPtrPtr - A pointer of pointer to Qh for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-DestoryQh (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_QH_ENTITY *QhPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Destory Qh Structure\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- QhPtr - A pointer to Qh\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateQtd (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 *DataPtr,\r
- IN UINTN DataLen,\r
- IN UINT8 PktId,\r
- IN UINT8 Toggle,\r
- IN UINT8 QtdStatus,\r
- OUT EHCI_QTD_ENTITY **QtdPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qtd Structure and Pre-Initialize it\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DataPtr - A pointer to user data buffer to transfer\r
- DataLen - Length of user data to transfer\r
- PktId - Packet Identification of this Qtd\r
- Toggle - Data Toggle of this Qtd\r
- QtdStatus - Default value of status of this Qtd\r
- QtdPtrPtr - A pointer of pointer to Qtd for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_OUT_OF_RESOURCES Cannot allocate resources\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateSetupQtd (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 *DevReqPtr,\r
- OUT EHCI_QTD_ENTITY **QtdPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qtd Structure for Setup\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DevReqPtr - A pointer to Device Request Data\r
- QtdPtrPtr - A pointer of pointer to Qtd for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_OUT_OF_RESOURCES Cannot allocate resources\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateDataQtd (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 *DataPtr,\r
- IN UINTN DataLen,\r
- IN UINT8 PktId,\r
- IN UINT8 Toggle,\r
- OUT EHCI_QTD_ENTITY **QtdPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qtd Structure for data\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DataPtr - A pointer to user data buffer to transfer\r
- DataLen - Length of user data to transfer\r
- PktId - Packet Identification of this Qtd\r
- Toggle - Data Toggle of this Qtd\r
- QtdPtrPtr - A pointer of pointer to Qtd for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_OUT_OF_RESOURCES Cannot allocate resources\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateStatusQtd (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 PktId,\r
- OUT EHCI_QTD_ENTITY **QtdPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qtd Structure for status\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- PktId - Packet Identification of this Qtd\r
- QtdPtrPtr - A pointer of pointer to Qtd for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_OUT_OF_RESOURCES Cannot allocate resources\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateAltQtd (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 PktId,\r
- OUT EHCI_QTD_ENTITY **QtdPtrPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qtd Structure for Alternative\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- PktId - Packet Identification of this Qtd\r
- QtdPtrPtr - A pointer of pointer to Qtd for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_OUT_OF_RESOURCES Cannot allocate resources\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateControlQtds (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 DataPktId,\r
- IN UINT8 *RequestCursor,\r
- IN UINT8 *DataCursor,\r
- IN UINTN DataLen,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT EHCI_QTD_ENTITY **ControlQtdsHead\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qtds list for Control Transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DataPktId - Packet Identification of Data Qtds\r
- RequestCursor - A pointer to request structure buffer to transfer\r
- DataCursor - A pointer to user data buffer to transfer\r
- DataLen - Length of user data to transfer\r
- ControlQtdsHead - A pointer of pointer to first Qtd for control tranfer for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-CreateBulkOrInterruptQtds (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 PktId,\r
- IN UINT8 *DataCursor,\r
- IN UINTN DataLen,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT EHCI_QTD_ENTITY **QtdsHead\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create Qtds list for Bulk or Interrupt Transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- PktId - Packet Identification of Qtds\r
- DataCursor - A pointer to user data buffer to transfer\r
- DataLen - Length of user data to transfer\r
- DataToggle - Data Toggle to start\r
- Translator - Translator Transaction for SplitX\r
- QtdsHead - A pointer of pointer to first Qtd for control tranfer for return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-DestoryQtds (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_QTD_ENTITY *FirstQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Destory all Qtds in the list\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- FirstQtdPtr - A pointer to first Qtd in the list\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-LinkQtdToQtd (\r
- IN EHCI_QTD_ENTITY *PreQtdPtr,\r
- IN EHCI_QTD_ENTITY *QtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Link Qtds together\r
-\r
-Arguments:\r
-\r
- PreQtdPtr - A pointer to pre Qtd\r
- QtdPtr - A pointer to next Qtd\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-LinkQtdsToAltQtd (\r
- IN EHCI_QTD_ENTITY *FirstQtdPtr,\r
- IN EHCI_QTD_ENTITY *AltQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Link AlterQtds together\r
-\r
-Arguments:\r
-\r
- FirstQtdPtr - A pointer to first Qtd in the list\r
- AltQtdPtr - A pointer to alternative Qtd\r
-\r
-Returns:\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-LinkQtdToQh (\r
- IN EHCI_QH_ENTITY *QhPtr,\r
- IN EHCI_QTD_ENTITY *QtdEntryPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Link Qtds list to Qh\r
-\r
-Arguments:\r
-\r
- QhPtr - A pointer to Qh\r
- QtdPtr - A pointer to first Qtd in the list\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-LinkQhToAsyncList (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_QH_ENTITY *QhPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Link Qh to Async Schedule List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- QhPtr - A pointer to Qh\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-UnlinkQhFromAsyncList (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_QH_ENTITY *QhPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Unlink Qh from Async Schedule List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- QhPtr - A pointer to Qh\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-LinkQhToPeriodicList (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_QH_ENTITY *QhPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Link Qh to Periodic Schedule List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- QhPtr - A pointer to Qh\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-UnlinkQhFromPeriodicList (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_QH_ENTITY *QhPtr,\r
- IN UINTN Interval\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Unlink Qh from Periodic Schedule List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- QhPtr - A pointer to Qh\r
- Interval - Interval of this periodic transfer\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-LinkToAsyncReqeust (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_ASYNC_REQUEST *AsyncRequestPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Llink AsyncRequest Entry to Async Request List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- AsyncRequestPtr - A pointer to Async Request Entry\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-UnlinkFromAsyncReqeust (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EHCI_ASYNC_REQUEST *AsyncRequestPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Unlink AsyncRequest Entry from Async Request List\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- AsyncRequestPtr - A pointer to Async Request Entry\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-UINTN\r
-GetNumberOfQtd (\r
- IN EHCI_QTD_ENTITY *FirstQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Number of Qtds in the list\r
-\r
-Arguments:\r
-\r
- FirstQtdPtr - A pointer to first Qtd in the list\r
-\r
-Returns:\r
-\r
- Number of Qtds in the list\r
-\r
---*/\r
-;\r
-\r
-\r
-\r
-UINTN\r
-GetCapacityOfQtd (\r
- IN UINT8 *BufferCursor\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Get Capacity of Qtd\r
-\r
-Arguments:\r
-\r
- BufferCursor - BufferCursor of the Qtd\r
-\r
-Returns:\r
-\r
- Capacity of Qtd\r
-\r
---*/\r
-;\r
-\r
-UINTN\r
-GetApproxiOfInterval (\r
- IN UINTN Interval\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Get the approximate value in the 2 index sequence\r
-\r
-Arguments:\r
-\r
- Interval - the value of interval\r
-\r
-Returns:\r
-\r
- approximate value of interval in the 2 index sequence\r
-\r
---*/\r
-;\r
-\r
-EHCI_QTD_HW *\r
-GetQtdNextPointer (\r
- IN EHCI_QTD_HW *HwQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Get Qtd next pointer field\r
-\r
-Arguments:\r
-\r
- HwQtdPtr - A pointer to hardware Qtd structure\r
-\r
-Returns:\r
-\r
- A pointer to next hardware Qtd structure\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsQtdStatusActive (\r
- IN EHCI_QTD_HW *HwQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Qtd status is active or not\r
-\r
-Arguments:\r
-\r
- HwQtdPtr - A pointer to hardware Qtd structure\r
-\r
-Returns:\r
-\r
- TRUE Active\r
- FALSE Inactive\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsQtdStatusHalted (\r
- IN EHCI_QTD_HW *HwQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Qtd status is halted or not\r
-\r
-Arguments:\r
-\r
- HwQtdPtr - A pointer to hardware Qtd structure\r
-\r
-Returns:\r\r
-\r
- TRUE Halted\r
- FALSE Not halted\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsQtdStatusBufferError (\r
- IN EHCI_QTD_HW *HwQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Qtd status is buffer error or not\r
-\r
-Arguments:\r
-\r
- HwQtdPtr - A pointer to hardware Qtd structure\r
-\r
-Returns:\r
-\r
- TRUE Buffer error\r
- FALSE No buffer error\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsQtdStatusBabbleError (\r
- IN EHCI_QTD_HW *HwQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Qtd status is babble error or not\r
-\r
-Arguments:\r
-\r
- HwQtdPtr - A pointer to hardware Qtd structure\r
-\r
-Returns:\r
-\r
- TRUE Babble error\r
- FALSE No babble error\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsQtdStatusTransactionError (\r
- IN EHCI_QTD_HW *HwQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether Qtd status is transaction error or not\r
-\r
-Arguments:\r
-\r
- HwQtdPtr - A pointer to hardware Qtd structure\r
-\r
-Returns:\r
-\r
- TRUE Transaction error\r
- FALSE No transaction error\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-IsDataInTransfer (\r
- IN UINT8 EndPointAddress\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Whether is a DataIn direction transfer\r
-\r
-Arguments:\r
-\r
- EndPointAddress - address of the endpoint\r
-\r
-Returns:\r
-\r
- TRUE DataIn\r
- FALSE DataOut\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-MapDataBuffer (\r
- IN USB2_HC_DEV *HcDev,\r
- IN EFI_USB_DATA_DIRECTION TransferDirection,\r
- IN OUT VOID *Data,\r
- IN OUT UINTN *DataLength,\r
- OUT UINT8 *PktId,\r
- OUT UINT8 **DataCursor,\r
- OUT VOID **DataMap\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Map address of user data buffer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- TransferDirection - direction of transfer\r
- Data - A pointer to user data buffer\r
- DataLength - length of user data\r
- PktId - Packte Identificaion\r
- DataCursor - mapped address to return\r
- DataMap - identificaion of this mapping to return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-MapRequestBuffer (\r
- IN USB2_HC_DEV *HcDev,\r
- IN OUT VOID *Request,\r
- OUT UINT8 **RequestCursor,\r
- OUT VOID **RequestMap\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Map address of request structure buffer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- Request - A pointer to request structure\r
- RequestCursor - Mapped address of request structure to return\r
- RequestMap - Identificaion of this mapping to return\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-SetQtdBufferPointer (\r
- IN EHCI_QTD_HW *QtdHwPtr,\r
- IN VOID *DataPtr,\r
- IN UINTN DataLen\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Set data buffer pointers in Qtd\r
-\r
-Arguments:\r
-\r
- QtdHwPtr - A pointer to Qtd hardware structure\r
- DataPtr - A pointer to user data buffer\r
- DataLen - Length of the user data buffer\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-EHCI_QTD_HW *\r
-GetQtdAlternateNextPointer (\r
- IN EHCI_QTD_HW *HwQtdPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Get Qtd alternate next pointer field\r
-\r
-Arguments:\r
-\r
- HwQtdPtr - A pointer to hardware Qtd structure\r
-\r
-Returns:\r
-\r
- A pointer to hardware alternate Qtd\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-ZeroOutQhOverlay (\r
- IN EHCI_QH_ENTITY *QhPtr\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Zero out the fields in Qh structure\r
-\r
-Arguments:\r
-\r
- QhPtr - A pointer to Qh structure\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-UpdateAsyncRequestTransfer (\r
- IN EHCI_ASYNC_REQUEST *AsyncRequestPtr,\r
- IN UINT32 TransferResult,\r
- IN UINTN ErrTDPos\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Update asynchronous request transfer\r
-\r
-Arguments:\r
-\r
- AsyncRequestPtr - A pointer to async request\r
- TransferResult - transfer result\r
- ErrQtdPos - postion of error Qtd\r
-\r
-Returns:\r
-\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-\r
-EFI_STATUS\r
-DeleteAsyncRequestTransfer (\r
- IN USB2_HC_DEV *HcDev,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- OUT UINT8 *DataToggle\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Delete all asynchronous request transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- DeviceAddress - address of usb device\r
- EndPointAddress - address of endpoint\r
- DataToggle - stored data toggle\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-VOID\r
-CleanUpAllAsyncRequestTransfer (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Clean up all asynchronous request transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
- VOID\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-ExecuteTransfer (\r
- IN USB2_HC_DEV *HcDev,\r
- IN BOOLEAN IsControl,\r
- IN EHCI_QH_ENTITY *QhPtr,\r
- IN OUT UINTN *ActualLen,\r
- OUT UINT8 *DataToggle,\r
- IN UINTN TimeOut,\r
- OUT UINT32 *TransferResult\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Execute Bulk or SyncInterrupt Transfer\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
- IsControl - Is control transfer or not\r
- QhPtr - A pointer to Qh\r
- ActualLen - Actual transfered Len\r
- DataToggle - Data Toggle\r
- TimeOut - TimeOut threshold\r
- TransferResult - Transfer result\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Sucess\r
- EFI_DEVICE_ERROR Error\r
-\r
---*/\r
-;\r
-\r
-BOOLEAN\r
-CheckQtdsTransferResult (\r
- IN BOOLEAN IsControl,\r
- IN EHCI_QH_ENTITY *QhPtr,\r
- OUT UINT32 *Result,\r
- OUT UINTN *ErrQtdPos,\r
- OUT UINTN *ActualLen\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Check transfer result of Qtds\r
-\r
-Arguments:\r
-\r
- IsControl - Is control transfer or not\r
- QhPtr - A pointer to Qh\r
- Result - Transfer result\r
- ErrQtdPos - Error TD Position\r
- ActualLen - Actual Transfer Size\r
-\r
-Returns:\r
-\r
- TRUE Qtds finished\r
- FALSE Not finish\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-AsyncRequestMoniter (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Interrupt transfer periodic check handler\r
-\r
-Arguments:\r
-\r
- Event - Interrupt event\r
- Context - Pointer to USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
- EFI_DEVICE_ERROR Fail\r
-\r
---*/\r
-;\r
-\r
-\r
-EFI_STATUS\r
-CreateNULLQH (\r
- IN USB2_HC_DEV *HcDev\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Create the NULL QH to make it as the Async QH header\r
-\r
-Arguments:\r
-\r
- HcDev - USB2_HC_DEV\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS Success\r
---*/\r
-;\r
-\r
-VOID\r
-DestroyNULLQH (\r
- IN USB2_HC_DEV *HcDev\r
- );\r
-\r
-VOID\r
-ClearLegacySupport (\r
- IN USB2_HC_DEV *HcDev\r
- );\r
-\r
-VOID\r
-HostReset (\r
- IN USB2_HC_DEV *HcDev\r
- );\r
-\r
-\r
-VOID\r
-DumpEHCIPortsStatus (\r
- IN USB2_HC_DEV *HcDev\r
- );\r
-\r
-\r
-#endif\r
projects / mirror_edk2.git / blobdiff