1. Added EdkPciIncompatibleDeviceSupportLib in EdkModulePkg, this library is used...

[mirror_edk2.git] / EdkModulePkg / Bus / Pci / PciBus / Dxe / PciCommand.c

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c
index f07c73fd3f96e09b4bc4eb419360c4f1f3be40e3..dd4b65061226ea06e611d38ca03ec9496692927c 100644 (file)
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c
@@ -1,18 +1,18 @@
 /*++\r
 \r
-Copyright (c) 2006, Intel Corporation                                                         \r
-All rights reserved. This program and the accompanying materials                          \r
-are licensed and made available under the terms and conditions of the BSD License         \r
-which accompanies this distribution.  The full text of the license may be found at        \r
-http://opensource.org/licenses/bsd-license.php                                            \r
-                                                                                          \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+Copyright (c) 2006 - 2007, Intel Corporation\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 Module Name:\r
 \r
   PciCommand.c\r
-  \r
+\r
 Abstract:\r
 \r
   PCI Bus Driver\r
@@ -56,13 +56,13 @@ Returns:
   PciIo       = &PciIoDevice->PciIo;\r
 \r
   if (Operation != EFI_SET_REGISTER) {\r
-    Status = PciIo->Pci.Read (\r
-                          PciIo,\r
-                          EfiPciIoWidthUint16,\r
-                          Offset,\r
-                          1,\r
-                          &OldCommand\r
-                          );\r
+    Status = PciIoRead (\r
+                         PciIo,\r
+                         EfiPciIoWidthUint16,\r
+                         Offset,\r
+                         1,\r
+                         &OldCommand\r
+                        );\r
 \r
     if (Operation == EFI_GET_REGISTER) {\r
       *PtrCommand = OldCommand;\r
@@ -71,20 +71,20 @@ Returns:
   }\r
 \r
   if (Operation == EFI_ENABLE_REGISTER) {\r
-    OldCommand |= Command;\r
+    OldCommand = (UINT16) (OldCommand | Command);\r
   } else if (Operation == EFI_DISABLE_REGISTER) {\r
-    OldCommand &= ~(Command);\r
+    OldCommand = (UINT16) (OldCommand & ~(Command));\r
   } else {\r
     OldCommand = Command;\r
   }\r
 \r
-  return PciIo->Pci.Write (\r
+  return PciIoWrite (\r
                       PciIo,\r
                       EfiPciIoWidthUint16,\r
                       Offset,\r
                       1,\r
                       &OldCommand\r
-                      );\r
+                    );\r
 }\r
 \r
 BOOLEAN\r
@@ -98,7 +98,7 @@ Routine Description:
 Arguments:\r
 \r
 Returns:\r
-  \r
+\r
   None\r
 \r
 --*/\r
@@ -131,7 +131,7 @@ Arguments:
   NextRegBlock        - A pointer to the next block.\r
 \r
 Returns:\r
-  \r
+\r
   None\r
 \r
 --*/\r
@@ -157,22 +157,22 @@ Returns:
     CapabilityPtr = 0;\r
     if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
 \r
-      PciIoDevice->PciIo.Pci.Read (\r
-                              &PciIoDevice->PciIo,\r
-                              EfiPciIoWidthUint8,\r
-                              EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,\r
-                              1,\r
-                              &CapabilityPtr\r
-                              );\r
+      PciIoRead (\r
+                  &PciIoDevice->PciIo,\r
+                  EfiPciIoWidthUint8,\r
+                  EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,\r
+                  1,\r
+                  &CapabilityPtr\r
+                );\r
     } else {\r
 \r
-      PciIoDevice->PciIo.Pci.Read (\r
-                              &PciIoDevice->PciIo,\r
-                              EfiPciIoWidthUint8,\r
-                              EFI_PCI_CAPABILITY_PTR,\r
-                              1,\r
-                              &CapabilityPtr\r
-                              );\r
+      PciIoRead (\r
+                  &PciIoDevice->PciIo,\r
+                  EfiPciIoWidthUint8,\r
+                  EFI_PCI_CAPABILITY_PTR,\r
+                  1,\r
+                  &CapabilityPtr\r
+                );\r
     }\r
   }\r
 \r
@@ -181,13 +181,13 @@ Returns:
     // Mask it to DWORD alignment per PCI spec\r
     //\r
     CapabilityPtr &= 0xFC;\r
-    PciIoDevice->PciIo.Pci.Read (\r
-                            &PciIoDevice->PciIo,\r
-                            EfiPciIoWidthUint16,\r
-                            CapabilityPtr,\r
-                            1,\r
-                            &CapabilityEntry\r
-                            );\r
+    PciIoRead (\r
+                &PciIoDevice->PciIo,\r
+                EfiPciIoWidthUint16,\r
+                CapabilityPtr,\r
+                1,\r
+                &CapabilityEntry\r
+              );\r
 \r
     CapabilityID = (UINT8) CapabilityEntry;\r
 \r