\r
#define MMC_OCR_POWERUP 0x80000000\r
\r
+#define MMC_OCR_ACCESS_MASK 0x3 /* bit[30-29] */\r
+#define MMC_OCR_ACCESS_BYTE 0x1 /* bit[29] */\r
+#define MMC_OCR_ACCESS_SECTOR 0x2 /* bit[30] */\r
+\r
#define MMC_CSD_GET_CCC(Response) (Response[2] >> 20)\r
#define MMC_CSD_GET_TRANSPEED(Response) (Response[3] & 0xFF)\r
#define MMC_CSD_GET_READBLLEN(Response) ((Response[2] >> 16) & 0xF)\r
#define EMMC_CMD6_ARG_VALUE(x) (((x) & 0xFF) << 8)\r
#define EMMC_CMD6_ARG_CMD_SET(x) (((x) & 0x7) << 0)\r
\r
+#define SWITCH_CMD_DATA_LENGTH 64\r
+#define SD_HIGH_SPEED_SUPPORTED 0x20000\r
+#define SD_DEFAULT_SPEED 25000000\r
+#define SD_HIGH_SPEED 50000000\r
+#define SWITCH_CMD_SUCCESS_MASK 0x0f000000\r
+\r
+#define BUSWIDTH_4 4\r
+\r
typedef enum {\r
UNKNOWN_CARD,\r
MMC_CARD, //MMC card\r
UINT32 PowerUp: 1; // This bit is set to LOW if the card has not finished the power up routine\r
} OCR;\r
\r
+typedef struct {\r
+ UINT8 SD_SPEC: 4; // SD Memory Card - Spec. Version [59:56]\r
+ UINT8 SCR_STRUCTURE: 4; // SCR Structure [63:60]\r
+ UINT8 SD_BUS_WIDTHS: 4; // DAT Bus widths supported [51:48]\r
+ UINT8 DATA_STAT_AFTER_ERASE: 1; // Data Status after erases [55]\r
+ UINT8 SD_SECURITY: 3; // CPRM Security Support [54:52]\r
+ UINT8 EX_SECURITY_1: 1; // Extended Security Support [43]\r
+ UINT8 SD_SPEC4: 1; // Spec. Version 4.00 or higher [42]\r
+ UINT8 RESERVED_1: 2; // Reserved [41:40]\r
+ UINT8 SD_SPEC3: 1; // Spec. Version 3.00 or higher [47]\r
+ UINT8 EX_SECURITY_2: 3; // Extended Security Support [46:44]\r
+ UINT8 CMD_SUPPORT: 4; // Command Support bits [35:32]\r
+ UINT8 RESERVED_2: 4; // Reserved [39:36]\r
+ UINT32 RESERVED_3; // Manufacturer Usage [31:0]\r
+} SCR;\r
+\r
typedef struct {\r
UINT32 NOT_USED; // 1 [0:0]\r
UINT32 CRC; // CRC7 checksum [7:1]\r
OCR OCRData;\r
CID CIDData;\r
CSD CSDData;\r
- ECSD ECSDData; // MMC V4 extended card specific\r
+ ECSD *ECSDData; // MMC V4 extended card specific\r
} CARD_INFO;\r
\r
typedef struct _MMC_HOST_INSTANCE {\r