--- /dev/null
+/*++ @file\r
+\r
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+Portions copyright (c) 2011, Apple Inc. All rights reserved.\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#ifndef _CPU_ARCHITECTURAL_PROTOCOL_DRIVER_H_\r
+#define _CPU_ARCHITECTURAL_PROTOCOL_DRIVER_H_\r
+\r
+\r
+#include <FrameworkDxe.h>\r
+#include <IndustryStandard/SmBios.h>\r
+#include <Protocol/Cpu.h>\r
+#include <Protocol/Smbios.h>\r
+#include <Protocol/FrameworkHii.h>\r
+#include <Guid/DataHubRecords.h>\r
+#include <Protocol/CpuIo2.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/HiiLib.h>\r
+#include <Library/UefiDriverEntryPoint.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/EmuThunkLib.h>\r
+\r
+\r
+extern UINT8 CpuStrings[];\r
+\r
+//\r
+// Internal Data Structures\r
+//\r
+#define CPU_ARCH_PROT_PRIVATE_SIGNATURE SIGNATURE_32 ('c', 'a', 'p', 'd')\r
+\r
+typedef struct {\r
+ UINTN Signature;\r
+ EFI_HANDLE Handle;\r
+\r
+ EFI_CPU_ARCH_PROTOCOL Cpu;\r
+ EFI_CPU_IO2_PROTOCOL CpuIo;\r
+\r
+ //\r
+ // Local Data for CPU interface goes here\r
+ //\r
+ BOOLEAN InterruptState;\r
+\r
+} CPU_ARCH_PROTOCOL_PRIVATE;\r
+\r
+#define CPU_ARCH_PROTOCOL_PRIVATE_DATA_FROM_THIS(a) \\r
+ CR (a, \\r
+ CPU_ARCH_PROTOCOL_PRIVATE, \\r
+ Cpu, \\r
+ CPU_ARCH_PROT_PRIVATE_SIGNATURE \\r
+ )\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+CpuMemoryServiceRead (\r
+ IN EFI_CPU_IO2_PROTOCOL *This,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+CpuMemoryServiceWrite (\r
+ IN EFI_CPU_IO2_PROTOCOL *This,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+CpuIoServiceRead (\r
+ IN EFI_CPU_IO2_PROTOCOL *This,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 UserAddress,\r
+ IN UINTN Count,\r
+ IN OUT VOID *UserBuffer\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+CpuIoServiceWrite (\r
+ IN EFI_CPU_IO2_PROTOCOL *This,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 UserAddress,\r
+ IN UINTN Count,\r
+ IN OUT VOID *UserBuffer\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+InitializeCpu (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuFlushCpuDataCache (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_PHYSICAL_ADDRESS Start,\r
+ IN UINT64 Length,\r
+ IN EFI_CPU_FLUSH_TYPE FlushType\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuEnableInterrupt (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuDisableInterrupt (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuGetInterruptState (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ OUT BOOLEAN *State\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuInit (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_CPU_INIT_TYPE InitType\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuRegisterInterruptHandler (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_EXCEPTION_TYPE InterruptType,\r
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuGetTimerValue (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN UINT32 TimerIndex,\r
+ OUT UINT64 *TimerValue,\r
+ OUT UINT64 *TimerPeriod OPTIONAL\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+EmuSetMemoryAttributes (\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT64 Attributes\r
+ );\r
+\r
+#endif\r