/** @file\r
- Implement all interfaces for EFI_PCI_IO_PROTOCOL.\r
+ Implements all interfaces for EFI_PCI_IO_PROTOCOL.\r
\r
Copyright (c) 2006 - 2008, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
\r
#include "PciBus.h"\r
\r
-//\r
-// Internal use only\r
-//\r
-\r
//\r
// Pci Io Protocol Interface\r
//\r
-EFI_PCI_IO_PROTOCOL PciIoInterface = {\r
+EFI_PCI_IO_PROTOCOL mPciIoInterface = {\r
PciIoPollMem,\r
PciIoPollIo,\r
{\r
\r
@param PciIoDevice Pci device instance.\r
@param Code status code.\r
+\r
**/\r
EFI_STATUS\r
ReportErrorStatusCode (\r
PCI_IO_DEVICE *PciIoDevice\r
)\r
{\r
- CopyMem (&PciIoDevice->PciIo, &PciIoInterface, sizeof (EFI_PCI_IO_PROTOCOL));\r
+ CopyMem (&PciIoDevice->PciIo, &mPciIoInterface, sizeof (EFI_PCI_IO_PROTOCOL));\r
}\r
\r
/**\r
//\r
if (Temp->Parent == PciIoDevice->Parent) {\r
\r
- PciReadCommandRegister (Temp, &VGACommand);\r
+ PCI_READ_COMMAND_REGISTER (Temp, &VGACommand);\r
\r
//\r
// If they are on the same bus, either one can\r
// GFX should be set to decode\r
//\r
if (Operation == EfiPciIoAttributeOperationDisable) {\r
- PciEnableCommandRegister (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
+ PCI_ENABLE_COMMAND_REGISTER (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
Temp->Attributes |= EFI_PCI_COMMAND_VGA_PALETTE_SNOOP;\r
} else {\r
return EFI_UNSUPPORTED;\r
// GFX should be set to snoop\r
//\r
if (Operation == EfiPciIoAttributeOperationEnable) {\r
- PciDisableCommandRegister (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
+ PCI_DISABLE_COMMAND_REGISTER (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
Temp->Attributes &= (~EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
} else {\r
return EFI_UNSUPPORTED;\r
//\r
// Enable relevant attributes to command register and bridge control register\r
//\r
- Status = PciEnableCommandRegister (PciIoDevice, Command);\r
+ Status = PCI_ENABLE_COMMAND_REGISTER (PciIoDevice, Command);\r
if (BridgeControl != 0) {\r
- Status = PciEnableBridgeControlRegister (PciIoDevice, BridgeControl);\r
+ Status = PCI_ENABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, BridgeControl);\r
}\r
\r
PciIoDevice->Attributes |= Attributes;\r
//\r
// Disable relevant attributes to command register and bridge control register\r
//\r
- Status = PciDisableCommandRegister (PciIoDevice, Command);\r
+ Status = PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, Command);\r
if (BridgeControl != 0) {\r
- Status = PciDisableBridgeControlRegister (PciIoDevice, BridgeControl);\r
+ Status = PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, BridgeControl);\r
}\r
\r
PciIoDevice->Attributes &= (~Attributes);\r