-/**@file\r
- Implement all interfaces for EFI_PCI_IO_PROTOCOL.\r
+/** @file\r
+ Implements all interfaces for EFI_PCI_IO_PROTOCOL.\r
\r
Copyright (c) 2006 - 2008, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
\r
#include "PciBus.h"\r
\r
-//\r
-// Internal use only\r
-//\r
-STATIC\r
-EFI_STATUS\r
-ReportErrorStatusCode (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN EFI_STATUS_CODE_VALUE Code\r
- );\r
-\r
-//\r
-// PCI I/O Support Function Prototypes\r
-//\r
-//\r
//\r
// Pci Io Protocol Interface\r
//\r
-static EFI_PCI_IO_PROTOCOL PciIoInterface = {\r
+EFI_PCI_IO_PROTOCOL mPciIoInterface = {\r
PciIoPollMem,\r
PciIoPollIo,\r
{\r
};\r
\r
/**\r
- report a error Status code of PCI bus driver controller\r
+ report a error Status code of PCI bus driver controller.\r
\r
- @param PciIoDevice Pci device instance\r
- @param Code status code\r
+ @param PciIoDevice Pci device instance.\r
+ @param Code status code.\r
+\r
+**/\r
+EFI_STATUS\r
+ReportErrorStatusCode (\r
+ IN PCI_IO_DEVICE *PciIoDevice,\r
+ IN EFI_STATUS_CODE_VALUE Code\r
+ );\r
+\r
+//\r
+// PCI I/O Support Function Prototypes\r
+//\r
+//\r
+\r
+/**\r
+ report a error Status code of PCI bus driver controller.\r
+ \r
+ @param PciIoDevice Pci device instance.\r
+ @param Code status code.\r
**/\r
-STATIC\r
EFI_STATUS\r
ReportErrorStatusCode (\r
IN PCI_IO_DEVICE *PciIoDevice,\r
}\r
\r
/**\r
- Initializes a PCI I/O Instance\r
+ Initializes a PCI I/O Instance.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
\r
- @retval EFI_SUCCESS Success operation\r
**/\r
-EFI_STATUS\r
+VOID\r
InitializePciIoInstance (\r
PCI_IO_DEVICE *PciIoDevice\r
)\r
{\r
- CopyMem (&PciIoDevice->PciIo, &PciIoInterface, sizeof (EFI_PCI_IO_PROTOCOL));\r
- return EFI_SUCCESS;\r
+ CopyMem (&PciIoDevice->PciIo, &mPciIoInterface, sizeof (EFI_PCI_IO_PROTOCOL));\r
}\r
\r
/**\r
\r
@param This A pointer to the EFI_PCI_IO_PROTOCOL.\r
@param Width Signifies the width of the memory or I/O operations.\r
- @param Address The base address of the memory or I/O operations. \r
+ @param BarIndex The BAR index of the standard PCI Configuration header to use as the\r
+ base address for the memory or I/O operation to perform. \r
+ @param Offset The offset within the selected BAR to start the memory or I/O operation. \r
@param Mask Mask used for the polling criteria.\r
@param Value The comparison value used for the polling exit criteria.\r
@param Delay The number of 100 ns units to poll.\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if (PciIoDevice->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) {\r
+ if ((PciIoDevice->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) != 0) {\r
Operation = (EFI_PCI_IO_PROTOCOL_OPERATION) (Operation + EfiPciOperationBusMasterRead64);\r
}\r
\r
EFI_STATUS Status;\r
PCI_IO_DEVICE *PciIoDevice;\r
\r
- if (Attributes &\r
- (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED))) {\r
+ if ((Attributes &\r
+ (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED))) != 0){\r
return EFI_UNSUPPORTED;\r
}\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (PciIoDevice->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) {\r
+ if ((PciIoDevice->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) != 0) {\r
Attributes |= EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE;\r
}\r
\r
//\r
// Call the PCI Root Bridge to attempt to modify the attributes\r
//\r
- if (NewPciRootBridgeAttributes ^ PciRootBridgeAttributes) {\r
+ if ((NewPciRootBridgeAttributes ^ PciRootBridgeAttributes) != 0) {\r
\r
Status = PciIoDevice->PciRootBridgeIo->SetAttributes (\r
PciIoDevice->PciRootBridgeIo,\r
//\r
Temp = ActiveVGADeviceOnTheSameSegment (PciIoDevice);\r
\r
- if (!Temp) {\r
+ if (Temp == NULL) {\r
//\r
// If there is no VGA device on the segement, set\r
// this graphics card to decode the palette range\r
//\r
if (Temp->Parent == PciIoDevice->Parent) {\r
\r
- PciReadCommandRegister (Temp, &VGACommand);\r
+ PCI_READ_COMMAND_REGISTER (Temp, &VGACommand);\r
\r
//\r
// If they are on the same bus, either one can\r
// be set to snoop, the other set to decode\r
//\r
- if (VGACommand & EFI_PCI_COMMAND_VGA_PALETTE_SNOOP) {\r
+ if ((VGACommand & EFI_PCI_COMMAND_VGA_PALETTE_SNOOP) != 0) {\r
//\r
// VGA has set to snoop, so GFX can be only set to disable snoop\r
//\r
// GFX should be set to decode\r
//\r
if (Operation == EfiPciIoAttributeOperationDisable) {\r
- PciEnableCommandRegister (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
+ PCI_ENABLE_COMMAND_REGISTER (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
Temp->Attributes |= EFI_PCI_COMMAND_VGA_PALETTE_SNOOP;\r
} else {\r
return EFI_UNSUPPORTED;\r
// GFX should be set to snoop\r
//\r
if (Operation == EfiPciIoAttributeOperationEnable) {\r
- PciDisableCommandRegister (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
+ PCI_DISABLE_COMMAND_REGISTER (Temp, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
Temp->Attributes &= (~EFI_PCI_COMMAND_VGA_PALETTE_SNOOP);\r
} else {\r
return EFI_UNSUPPORTED;\r
//\r
// For Root Bridge, just call RootBridgeIo to set attributes;\r
//\r
- if (!PciIoDevice->Parent) {\r
+ if (PciIoDevice->Parent == NULL) {\r
Status = ModifyRootBridgeAttributes (PciIoDevice, Attributes, Operation);\r
return Status;\r
}\r
//\r
// Check VGA and VGA16, they can not be set at the same time\r
//\r
- if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) ||\r
- ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) ||\r
- ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) ||\r
- ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) ) {\r
+ if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||\r
+ ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ||\r
+ ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||\r
+ ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ) {\r
return EFI_UNSUPPORTED;\r
}\r
\r
//\r
if (IS_PCI_BRIDGE (&PciIoDevice->Pci) || IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
\r
- if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {\r
+ if ((Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0) {\r
BridgeControl |= EFI_PCI_BRIDGE_CONTROL_VGA;\r
}\r
\r
- if (Attributes & EFI_PCI_IO_ATTRIBUTE_ISA_IO) {\r
+ if ((Attributes & EFI_PCI_IO_ATTRIBUTE_ISA_IO) != 0) {\r
BridgeControl |= EFI_PCI_BRIDGE_CONTROL_ISA;\r
}\r
\r
- if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) {\r
+ if ((Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) != 0) {\r
Command |= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO;\r
}\r
\r
- if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {\r
+ if ((Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0) {\r
BridgeControl |= EFI_PCI_BRIDGE_CONTROL_VGA_16;\r
}\r
\r
// Do with the attributes on VGA\r
// Only for VGA's legacy resource, we just can enable once.\r
//\r
- if (Attributes &\r
+ if ((Attributes &\r
(EFI_PCI_IO_ATTRIBUTE_VGA_IO |\r
EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 |\r
- EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY)) {\r
+ EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY)) != 0) {\r
//\r
// Check if a VGA has been enabled before enabling a new one\r
//\r
// Check if there have been an active VGA device on the same segment\r
//\r
Temp = ActiveVGADeviceOnTheSameSegment (PciIoDevice);\r
- if (Temp && Temp != PciIoDevice) {\r
+ if (Temp != NULL && Temp != PciIoDevice) {\r
//\r
// An active VGA has been detected, so can not enable another\r
//\r
//\r
// Do with the attributes on GFX\r
//\r
- if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) {\r
+ if ((Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) != 0) {\r
\r
if (Operation == EfiPciIoAttributeOperationEnable) {\r
//\r
}\r
}\r
\r
- if (Attributes & EFI_PCI_IO_ATTRIBUTE_IO) {\r
+ if ((Attributes & EFI_PCI_IO_ATTRIBUTE_IO) != 0) {\r
Command |= EFI_PCI_COMMAND_IO_SPACE;\r
}\r
\r
- if (Attributes & EFI_PCI_IO_ATTRIBUTE_MEMORY) {\r
+ if ((Attributes & EFI_PCI_IO_ATTRIBUTE_MEMORY) != 0) {\r
Command |= EFI_PCI_COMMAND_MEMORY_SPACE;\r
}\r
\r
- if (Attributes & EFI_PCI_IO_ATTRIBUTE_BUS_MASTER) {\r
+ if ((Attributes & EFI_PCI_IO_ATTRIBUTE_BUS_MASTER) != 0) {\r
Command |= EFI_PCI_COMMAND_BUS_MASTER;\r
}\r
//\r
//\r
// Enable relevant attributes to command register and bridge control register\r
//\r
- Status = PciEnableCommandRegister (PciIoDevice, Command);\r
- if (BridgeControl) {\r
- Status = PciEnableBridgeControlRegister (PciIoDevice, BridgeControl);\r
+ Status = PCI_ENABLE_COMMAND_REGISTER (PciIoDevice, Command);\r
+ if (BridgeControl != 0) {\r
+ Status = PCI_ENABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, BridgeControl);\r
}\r
\r
PciIoDevice->Attributes |= Attributes;\r
//\r
// Disable relevant attributes to command register and bridge control register\r
//\r
- Status = PciDisableCommandRegister (PciIoDevice, Command);\r
- if (BridgeControl) {\r
- Status = PciDisableBridgeControlRegister (PciIoDevice, BridgeControl);\r
+ Status = PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, Command);\r
+ if (BridgeControl != 0) {\r
+ Status = PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, BridgeControl);\r
}\r
\r
PciIoDevice->Attributes &= (~Attributes);\r
\r
Parent = PciIoDevice->Parent;\r
\r
- while (Parent && IS_PCI_BRIDGE (&Parent->Pci)) {\r
+ while (Parent != NULL && IS_PCI_BRIDGE (&Parent->Pci)) {\r
\r
//\r
// Get the PciIo Protocol\r
projects / mirror_edk2.git / blobdiff